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Tue, 20 Feb 2024 10:28:19 GMT Received: from [10.239.132.150] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 20 Feb 2024 02:28:13 -0800 Message-ID: <374902c2-b1c4-42bd-aa34-fbb188b8428a@quicinc.com> Date: Tue, 20 Feb 2024 18:28:10 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 5/6] arm64: dts: qcom: add base AIM500 dtsi Content-Language: en-US To: Jingyi Wang , Dmitry Baryshkov CC: , , , , , , , , , Tingwei Zhang References: <20240205115721.1195336-1-quic_jingyw@quicinc.com> <20240205115721.1195336-6-quic_jingyw@quicinc.com> <9685991e-6577-4f96-a17f-b0a65d8d1260@quicinc.com> <37f1cede-6d70-4443-be8e-ef12266531a0@quicinc.com> From: "Aiqun Yu (Maria)" In-Reply-To: <37f1cede-6d70-4443-be8e-ef12266531a0@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: qeGl04L0-GnX52yBAdRy_jMqx_1w1xgd X-Proofpoint-GUID: qeGl04L0-GnX52yBAdRy_jMqx_1w1xgd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-20_06,2024-02-19_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 mlxscore=0 spamscore=0 mlxlogscore=999 bulkscore=0 clxscore=1015 adultscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402200075 On 2/20/2024 6:06 PM, Jingyi Wang wrote: > Hi Dmitry, > > On 2/20/2024 5:19 PM, Dmitry Baryshkov wrote: >> On Tue, 20 Feb 2024 at 11:17, Jingyi Wang wrote: >>> >>> Hi Dmitry, >>> >>> On 2/5/2024 10:23 PM, Dmitry Baryshkov wrote: >>>> On Mon, 5 Feb 2024 at 14:00, Jingyi Wang wrote: >>>>> >>>>> Introduce aim500 board dtsi. >>>> >>>> So, is it a board or a module? >>>> >>> aim500 is a module, will fix the descrption. >>> >>>>> >>>>> AIM500 Series is a highly optimized family of modules designed to >>>>> support AIoT and Generative AI applications based on sm8650p with >>>>> PMIC and bluetooth functions etc. >>>>> >>>>> Co-developed-by: Tingwei Zhang >>>>> Signed-off-by: Tingwei Zhang >>>>> Signed-off-by: Jingyi Wang >>>>> --- >>>>> arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi | 409 +++++++++++++++++++ >>>>> 1 file changed, 409 insertions(+) >>>>> create mode 100644 arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi b/arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi >>>>> new file mode 100644 >>>>> index 000000000000..cb857da8653b >>>>> --- /dev/null >>>>> +++ b/arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi >>>>> @@ -0,0 +1,409 @@ >>>>> +// SPDX-License-Identifier: BSD-3-Clause >>>>> +/* >>>>> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. >>>>> + */ >>>>> + >>>>> +#include >>>>> +#include "sm8650p.dtsi" >>>>> +#include "pm8550.dtsi" >>>>> +#include "pm8550b.dtsi" >>>>> +#define PMK8550VE_SID 8 >>>>> +#include "pm8550ve.dtsi" >>>>> +#include "pm8550vs.dtsi" >>>>> +#include "pmk8550.dtsi" >>>>> + >>>>> +/ { >>>>> + aliases { >>>>> + serial1 = &uart14; >>>>> + }; >>>>> + >>>>> + vph_pwr: vph-pwr-regulator { }; >>>> >>>> Is this regulator a part of the module or a part of the carrier board? >>>> If the latter is true, this must go to the carrier board DT file. >>>> >>> >>> the vph_pwr regulator is defined in the aim500-aiot carrier board and used >>> in aim500 module. >> >> If it is defined in the carrier board, then please move it and >> corresponding supply entries to the carrier board dts. Other devices >> using the SoM can have different power tree. >> >> While we are at it, could you please rename the node to regulator-vph-pwr? >> >> > will rename the node and move it to sm8650p-aim500-aiot.dts Shall we have the VPH_PWR implementation inside the board dts file, and have the supply entries which used the VPH_PWR inside the SOM.dtsi file? The VPH_PWR is an input IO of SOM. And the corresponding supply entries is inside the SOM hardware design as well. The VPH_PWR as a fixed regulator implementation is the board design, it can be changed to other design from different boards. Here is a simple diagram to show the hardware description of the VPH_PWR related design: +------------------------------------------------------+ | Board | | | | +-----------------+ | |power----->| Fixed regulator-----------+ | | +-----------------+ | | | | | | v VPH_PWR | | +------|----------------------+ | | | | SOM | | | | | | | | | | | vVPH_PWR vVPM_PWR| | | | +------+ +------+ | | | | | pmic1| |pmic2 | | | | | +------+ +------+ | | | | | | | +-----------------------------+ | +------------------------------------------------------+ > > Thanks, > Jingyi -- Thx and BRs, Aiqun(Maria) Yu