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Tue, 20 Feb 2024 10:11:32 GMT Received: from [10.214.66.81] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 20 Feb 2024 02:11:29 -0800 Message-ID: Date: Tue, 20 Feb 2024 15:41:26 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v11 1/4] firmware: qcom: scm: provide a read-modify-write function Content-Language: en-US To: Bjorn Andersson , Linus Walleij CC: Mark Brown , , , , References: <1704727654-13999-1-git-send-email-quic_mojha@quicinc.com> <1704727654-13999-2-git-send-email-quic_mojha@quicinc.com> <3a17f36a-04bf-04f2-7a22-82b76977b325@quicinc.com> <6lmxlfopjzxbvn5oe6uha2ppdjderuymgq3h3gz2suyb5i2vs6@mpadw4b37s5t> From: Mukesh Ojha In-Reply-To: <6lmxlfopjzxbvn5oe6uha2ppdjderuymgq3h3gz2suyb5i2vs6@mpadw4b37s5t> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: D3SoTYIZC-4s_saOcdRgFyLJ_gHyZYy9 X-Proofpoint-GUID: D3SoTYIZC-4s_saOcdRgFyLJ_gHyZYy9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-20_06,2024-02-19_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 phishscore=0 suspectscore=0 bulkscore=0 adultscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=999 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402200071 On 2/17/2024 12:01 AM, Bjorn Andersson wrote: > On Tue, Jan 09, 2024 at 02:34:10PM +0100, Linus Walleij wrote: >> On Tue, Jan 9, 2024 at 2:24 PM Mukesh Ojha wrote: >>> On 1/9/2024 6:44 PM, Linus Walleij wrote: >>>> On Mon, Jan 8, 2024 at 4:28 PM Mukesh Ojha wrote: >>>> >>>>> It was realized by Srinivas K. that there is a need of >>>>> read-modify-write scm exported function so that it can >>>>> be used by multiple clients. >>>>> >>>>> Let's introduce qcom_scm_io_rmw() which masks out the bits >>>>> and write the passed value to that bit-offset. >>>> (...) >>>>> +int qcom_scm_io_rmw(phys_addr_t addr, unsigned int mask, unsigned int val) >>>>> +{ >>>>> + unsigned int old, new; >>>>> + int ret; >>>>> + >>>>> + if (!__scm) >>>>> + return -EINVAL; >>>>> + >>>>> + spin_lock(&__scm->lock); >>>>> + ret = qcom_scm_io_readl(addr, &old); >>>>> + if (ret) >>>>> + goto unlock; >>>>> + >>>>> + new = (old & ~mask) | (val & mask); >>>>> + >>>>> + ret = qcom_scm_io_writel(addr, new); >>>>> +unlock: >>>>> + spin_unlock(&__scm->lock); >>>>> + return ret; >>>>> +} >>>>> +EXPORT_SYMBOL_GPL(qcom_scm_io_rmw); >>>> >>>> This looks a lot like you are starting to re-invent regmaps >>>> regmap_update_bits(). >>>> >>>> If you are starting to realize you need more and more of >>>> regmap, why not use regmap and its functions? >>> >>> I think, this discussion has happened already .. >>> >>> https://lore.kernel.org/lkml/CACRpkdb95V5GC81w8fiuLfx_V1DtWYpO33FOfMnArpJeC9SDQA@mail.gmail.com/ >> >> That discussion ended with: >> >> [Bjorn] >>> We'd still need qcom_scm_io_readl() and qcom_scm_io_writel() exported to >>> implement the new custom regmap implementation - and the struct >>> regmap_config needed in just pinctrl-msm alone would be larger than the >>> one function it replaces. >> >> When you add more and more accessors the premise starts to >> change, and it becomes more and more of a reimplementation. >> >> It may be time to actually fix this. >> > > Thought I had replied to this already, did we discuss this previously as > well? > > My concern with expressing this as a regmap is that from the provider's > point of view, the regmap would span the entire 32-bit address space. > I'm guessing that there's something on the other side limiting what > subregions are actually accessible for each platform/firmware > configuration, but I'm not convinced that regmap a good abstraction... To add more to it, in current series, we are just accessing single register for read/write and using regmap for this looks overkill to me. -Mukesh > > Regards, > Bjorn > >> Yours, >> Linus Walleij