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From: "Buddhabhatti, Jay" <jay.buddhabhatti@amd.com>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>, "Simek, Michal"
	<michal.simek@amd.com>
CC: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"monstr@monstr.eu" <monstr@monstr.eu>, "michal.simek@xilinx.com"
	<michal.simek@xilinx.com>, "git@xilinx.com" <git@xilinx.com>, Conor Dooley
	<conor+dt@kernel.org>, Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@linaro.org>, Rob Herring <robh@kernel.org>, "open
 list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>, "moderated list:ARM/ZYNQ ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>, "open list:REAL TIME CLOCK (RTC)
 SUBSYSTEM" <linux-rtc@vger.kernel.org>
Subject: RE: [PATCH] dt-bindings: rtc: zynqmp: Describe power-domains property
Thread-Topic: [PATCH] dt-bindings: rtc: zynqmp: Describe power-domains
 property
Thread-Index: AQHaY+ZmsRZsdu8zXkqO0n0tzvdoobETDdZQ
Date: Tue, 20 Feb 2024 10:51:57 +0000
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Hi Alexandre,

> -----Original Message-----
> From: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Sent: Tuesday, February 20, 2024 1:49 AM
> To: Simek, Michal <michal.simek@amd.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>; linux-
> kernel@vger.kernel.org; monstr@monstr.eu; michal.simek@xilinx.com;
> git@xilinx.com; Conor Dooley <conor+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Rob Herring <robh@kernel.org>; open
> list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> <devicetree@vger.kernel.org>; moderated list:ARM/ZYNQ ARCHITECTURE
> <linux-arm-kernel@lists.infradead.org>; open list:REAL TIME CLOCK (RTC)
> SUBSYSTEM <linux-rtc@vger.kernel.org>
> Subject: Re: [PATCH] dt-bindings: rtc: zynqmp: Describe power-domains
> property
>=20
> On 19/02/2024 14:11:50+0100, Michal Simek wrote:
> >
> >
> > On 2/17/24 09:26, Krzysztof Kozlowski wrote:
> > > On 16/02/2024 10:42, Michal Simek wrote:
> > > >
> > > >
> > > > On 2/16/24 10:19, Krzysztof Kozlowski wrote:
> > > > > On 16/02/2024 09:51, Michal Simek wrote:
> > > > > > RTC has its own power domain on Xilinx Versal SOC that's why
> > > > > > describe it as optional property.
> > > > > >
> > > > > > Signed-off-by: Michal Simek <michal.simek@amd.com>
> > > > > > ---
> > > > > >
> > > > > >    Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml |=
 3
> +++
> > > > > >    1 file changed, 3 insertions(+)
> > > > > >
> > > > >
> > > > > But Versal is not described in this binding, is it? I see only
> > > > > one compatible.
> > > >
> > > > It is the same IP only as is on zynqmp with own power rail.
> > >
> > > Then you should have separate compatible, because they are not
> > > identical. It would also allow you to narrow the domains to versal
> > > and also require it (on versal).
> >
> > I can double check with HW guys but I am quite sure IP itself is
> > exactly the same. What it is different is that there is own power
> > domain to it (not shared one as is in zynqmp case).
> >
> > Also Linux is non secure sw and if secure firmware won't allow to
> > change setting of it it can't be required. I am just saying that Linux
> > doesn't need to be owner of any power domain that's why it shouldn't
> > be required property.
>=20
> I guess because the integration is different, you still need a differente
> compatible so you can forbid the property on non-Versal.

[Jay] RTC has its own power domain in case of Versal and ZynqMP both that w=
e double check it.

Thanks,
Jay
>=20
> >
> > Thanks,
> > Michal
>=20
> --
> Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel
> engineering https://bootlin.com