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Date: Tue, 20 Feb 2024 22:57:06 +0800
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH net-next v3 3/6] net: hisilicon: add support for
 hisi_femac core on Hi3798MV200
Content-Language: en-US
To: Maxime Chevallier <maxime.chevallier@bootlin.com>,
 Yang Xiwen via B4 Relay <devnull+forbidden405.outlook.com@kernel.org>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>,
 Salil Mehta <salil.mehta@huawei.com>, "David S. Miller"
 <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>,
 Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
 Rob Herring <robh+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Conor Dooley <conor+dt@kernel.org>, Andrew Lunn <andrew@lunn.ch>,
 Heiner Kallweit <hkallweit1@gmail.com>, Russell King
 <linux@armlinux.org.uk>, netdev@vger.kernel.org,
 linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
 Simon Horman <horms@kernel.org>
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From: Yang Xiwen <forbidden405@outlook.com>
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 =?utf-8?B?YW5yeW5wQnhGYTEvQUM2NStRVlByQlZvN1B6bXg5S0RQMmU3ZnkxRldmTlIx?=
 =?utf-8?B?RXlEVUluL0xOaDZWZ0NtU2Z5dkRGVTJvbnI4L1BlTGRna0ppTFNVa3N4TzEx?=
 =?utf-8?B?dEY2K040UjFDY3dITkhRb0xnajBtaTF2OTZOMFdoVklISHh6TXJlM3hnQXNh?=
 =?utf-8?B?VUZ6aDJGaUVjQ0o0UEdDeldzVUxyR0ZqdjVYYkNVTDhqM21nYU1NaGt0TTVa?=
 =?utf-8?B?ajdaYzNudDdnQUNkdk5iU3lWTGFyY2xKSmh4c3o0UWdrTUVDS3lqcjhabDkv?=
 =?utf-8?B?cFJ1N05WUm9RcGhqSEloMkhwanBaWkJ3cGk4Z2JyZE1RSnhyWnFxTUF1R2JN?=
 =?utf-8?B?S3lQMjJId2ZBOEEyV1hkTEFLVVZ1d1AzdWozd1B4SWRTL1dUcklqc1RObTJR?=
 =?utf-8?B?SFBaVkhZRmRMSEMwTWpjb3h3N3IvWkhxdk5FNGZabmVqTTRaT2hMdlFKZXJy?=
 =?utf-8?B?MW9RdGxNQUJ5S2xYajdJNVd6endZL1Ixa3R1MEJtVk5BT0szaXRQV0txVlU5?=
 =?utf-8?B?cFNkYXZXc09Vek5UQW04UktsV2F2NElEYXcreVZvWmFHQjNxUzNyR3NpRGZh?=
 =?utf-8?B?by9BM2VRL0xMekJmQy9mVHd1QVVIN014dVJVNFQwWFlpbXorcnRIMmZNeG1j?=
 =?utf-8?B?UzROdG1ValhtWjJYS3JiSFBVbTU2Y0dpTWFTeUI1RnYxQnhubUVMSmk4bG4r?=
 =?utf-8?B?bFNoTy9Ud2YxbTREZVFObTBJUUVhMW9Oa29vNWFCNE5ORTFjamhoVk1nRVkz?=
 =?utf-8?B?R0dITGxINDVaUm53MEFWbVY0dW04aWR4UEVxb1MzYmYxZGZoc0RpaE5MYUNG?=
 =?utf-8?B?dEhHQ1Y4Rys1eG5qbVNkQnNSZko0VlhvRUg3eXRwVzJicjJaVHZLcWhyaVky?=
 =?utf-8?B?RlByeU9MSDROZVZBd2xvZFJUcjNqN0VmOXU0YU1kejdSNjVBL29qMEd4aHpX?=
 =?utf-8?B?YkczdUw1eSs1cW1mY0FHdzFUQ1gwbDE4NlRZOWsweExURnlSeDgyWG1jcUhY?=
 =?utf-8?B?SlI0YXd1NE4vaGN4SDFBbkZjY0RFWFlDb3FpTXB6NTgrY1AyeXlNNG14bHZl?=
 =?utf-8?B?eDFTTVRyUERpRDVBV2JoWUlFSlY4WGF2amlLRU13SkdtZldzRUlZS3JDNWZn?=
 =?utf-8?B?czZFendXMXlKa2E4ditPUG96QUhic1QxVS9uV1RoeXRwckF0MDlQbDNHZW5O?=
 =?utf-8?B?Y2RrbGZRTGZEK0QxKzd4azMzeUVubGNRTElLazVXQ2JBT2tZeExzdnFpS3Bk?=
 =?utf-8?B?YWV4enVaNDZDTEFieVZaZDlXNkFhY2dPV1pTWGgvbUhmcGttTFU3a2d2NUpO?=
 =?utf-8?B?UTNNSk0wVUU2NEZZTmdDekFRT0g1cFJBQ2JBRjlUbFcrQ3VPOGJXcFN4VWJB?=
 =?utf-8?B?TDc3bHN6a0wwWDNTVFhkbkVUam9VdXNPdFVLa0QreEs1TVArcmFhQm1wb2tO?=
 =?utf-8?B?VGVmRkdzbTRubUtqZ29GMzRVV0hjZEZMRFhnQVZ0UGpPZXlYNTFWaFc2dGdo?=
 =?utf-8?B?eVBhMGE1NHVmM1k2T1RaR0wyQ1pIWTNLaGJTbmV5aUkzTjdIWm5pSGRjQThp?=
 =?utf-8?B?UysyWXhndkdFV3JQeGZLU01CdkxmSlJYSms1bmpjWEluTUJHVFJSUDNTcHMv?=
 =?utf-8?B?VzNoVnJDY291RlJZQ1NUZXRTcFFOQ24yR1lGTWRPcjlPYmRIOGRkMDlLamNU?=
 =?utf-8?Q?yX6ViS9w8CNfYD7G2csHKcfHCYOG023boLSa3O0?=
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On 2/20/2024 10:47 PM, Maxime Chevallier wrote:
> Hello,
>
> On Tue, 20 Feb 2024 03:57:38 +0800
> Yang Xiwen via B4 Relay <devnull+forbidden405.outlook.com@kernel.org>
> wrote:
>
>> From: Yang Xiwen <forbidden405@outlook.com>
>>
>> Register the sub MDIO bus if it is found. Also implement the internal
>> PHY reset procedure as needed.
>>
>> Note it's unable to put the MDIO bus node outside of MAC controller
>> (i.e. at the same level in the parent bus node). Because we need to
>> control all clocks and resets in FEMAC driver due to the phy reset
>> procedure. So the clocks can't be assigned to MDIO bus device, which is
>> an essential resource for the MDIO bus to work.
>>
>> No backward compatibility is maintained since the only existing
>> user(Hi3516DV300) has not received any updates from HiSilicon for about
>> 8 years already. And till today, no mainline dts for this SoC is found.
>> It seems unlikely that there are still existing mainline Hi3516DV300
>> users. The effort to maintain the old binding seems gain a little.
>>
>> Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
> Besides what Andrew and Simon already mentionned, I have a few other
> small comments :
>
> [...]
>
>> @@ -797,23 +816,22 @@ static int hisi_femac_drv_probe(struct platform_device *pdev)
>>   		goto out_free_netdev;
>>   	}
>>   
>> -	priv->clk = devm_clk_get(&pdev->dev, NULL);
>> -	if (IS_ERR(priv->clk)) {
>> -		dev_err(dev, "failed to get clk\n");
>> -		ret = -ENODEV;
>> +	ret = devm_clk_bulk_get_all(&pdev->dev, &priv->clks);
>> +	if (ret < 0 || ret != CLK_NUM) {
>> +		dev_err(dev, "failed to get clk bulk: %d\n", ret);
>>   		goto out_free_netdev;
>>   	}
>>   
>> -	ret = clk_prepare_enable(priv->clk);
>> +	ret = clk_bulk_prepare_enable(CLK_NUM, priv->clks);
>>   	if (ret) {
>> -		dev_err(dev, "failed to enable clk %d\n", ret);
>> +		dev_err(dev, "failed to enable clk bulk: %d\n", ret);
>>   		goto out_free_netdev;
>>   	}
>>   
>>   	priv->mac_rst = devm_reset_control_get(dev, "mac");
>>   	if (IS_ERR(priv->mac_rst)) {
>>   		ret = PTR_ERR(priv->mac_rst);
>> -		goto out_disable_clk;
>> +		goto out_free_netdev;
> When you return here (or even later), you are missing a call to
> "clk_bulk_disable_unprepare" in the cleanup path


I didn't notice that. Originally i'm using devm_clk_get_enabled() so 
it's not needed.


Maybe we can add a devm_clk_bulk_get_prepared_enabled() API to clk 
framework too.


>
>>   	}
>>   	hisi_femac_core_reset(priv);
>>   
>> @@ -826,15 +844,34 @@ static int hisi_femac_drv_probe(struct platform_device *pdev)
>>   						 priv->phy_reset_delays,
>>   						 DELAYS_NUM);
>>   		if (ret)
>> -			goto out_disable_clk;
>> +			goto out_free_netdev;
>>   		hisi_femac_phy_reset(priv);
>>   	}
>>   
>> +	// Register the optional MDIO bus
> I think this comment style should be avoided, in favor of C-style
> comments ( /* blabla */ )


Will fix in next release.


>
>> +	for_each_available_child_of_node(node, mdio_np) {
>> +		if (of_node_name_prefix(mdio_np, "mdio")) {
>> +			priv->mdio_pdev = of_platform_device_create(mdio_np, NULL, dev);
>> +			of_node_put(mdio_np);
>> +			if (!priv->mdio_pdev) {
>> +				dev_err(dev, "failed to register MDIO bus device\n");
>> +				ret = -ENODEV;
>> +				goto out_free_netdev;
>> +			}
>> +			mdio_registered = true;
>> +			break;
>> +		}
>> +		of_node_put(mdio_np);
>> +	}
>> +
>> +	if (!mdio_registered)
>> +		dev_warn(dev, "MDIO subnode not found. This is usually a bug.\n");
>> +
>>   	phy = of_phy_get_and_connect(ndev, node, hisi_femac_adjust_link);
>>   	if (!phy) {
>>   		dev_err(dev, "connect to PHY failed!\n");
>>   		ret = -ENODEV;
>> -		goto out_disable_clk;
>> +		goto out_unregister_mdio_bus;
>>   	}
>>   
>>   	phy_attached_print(phy, "phy_id=0x%.8lx, phy_mode=%s\n",
> Thanks,
>
> Maxime


-- 
Regards,
Yang Xiwen