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Date: Tue, 20 Feb 2024 11:50:19 -0500
From: "Stefan O'Rear" <sorear@fastmail.com>
To: =?UTF-8?Q?Cl=C3=A9ment_L=C3=A9ger?= <cleger@rivosinc.com>,
 "Jonathan Corbet" <corbet@lwn.net>,
 "Paul Walmsley" <paul.walmsley@sifive.com>,
 "Palmer Dabbelt" <palmer@dabbelt.com>, "Albert Ou" <aou@eecs.berkeley.edu>,
 linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org,
 linux-kernel@vger.kernel.org
Cc: "Robin Ehn" <rehn@rivosinc.com>, "Charlie Jenkins" <charlie@rivosinc.com>,
 "Jessica Clarke" <jrtc27@jrtc27.com>
Subject: Re: [PATCH v2] riscv: hwprobe: export largest userspace address
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On Tue, Feb 20, 2024, at 6:09 AM, Cl=C3=A9ment L=C3=A9ger wrote:
> Some userspace applications (OpenJDK for instance) uses the free MSBs
> in pointers to insert additional information for their own logic and
> need to get this information from somewhere. Currently they rely on
> parsing /proc/cpuinfo "mmu=3Dsvxx" string to obtain the current value =
of
> virtual address used bits [1]. Since this reflect the raw MMU mode
> supported, it might differ from the logical one used internally.
> Exporting the maximum mmappable address through hwprobe will allow a
> more stable interface to be used. For that purpose, add a new hwprobe
> key named RISCV_HWPROBE_MAX_KEY which will export the maximum mmappable
> userspace address.
>
> Link:=20
> https://github.com/openjdk/jdk/blob/master/src/hotspot/os_cpu/linux_ri=
scv/vm_version_linux_riscv.cpp#L171=20
> [1]
> Signed-off-by: Cl=C3=A9ment L=C3=A9ger <cleger@rivosinc.com>

Reviewed-by: Stefan O'Rear <sorear@fastmail.com>

Ideally, we'd have something arch-independent, but this is a good interf=
ace
and simple enough to support in perpetuity.

-s

> ---
> v2:
>  - Note: tried sysconf to export it but this is not backed by syscall
>    and thus does not allow exporting such information easily.
>  - Use arch_get_mmap_end() instead of VA_BITS since it reflects the
>    maximum logical address used by the riscv port
>  - Change hwprobe key name from RISCV_HWPROBE_KEY_VA_BITS to
>    RISCV_HWPROBE_KEY_MAX_ADDRESS
>  - Link to v1:=20
> https://lore.kernel.org/lkml/20240201140319.360088-1-cleger@rivosinc.c=
om/
> ---
>  Documentation/arch/riscv/hwprobe.rst  | 3 +++
>  arch/riscv/include/asm/hwprobe.h      | 2 +-
>  arch/riscv/include/uapi/asm/hwprobe.h | 1 +
>  arch/riscv/kernel/sys_hwprobe.c       | 4 ++++
>  4 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/arch/riscv/hwprobe.rst=20
> b/Documentation/arch/riscv/hwprobe.rst
> index b2bcc9eed9aa..a626aa21ac74 100644
> --- a/Documentation/arch/riscv/hwprobe.rst
> +++ b/Documentation/arch/riscv/hwprobe.rst
> @@ -210,3 +210,6 @@ The following keys are defined:
>=20
>  * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int whi=
ch
>    represents the size of the Zicboz block in bytes.
> +
> +* :c:macro:`RISCV_HWPROBE_KEY_MAX_USER_ADDRESS`: An unsigned long whi=
ch
> +  represent the maximum userspace mmappable address.
> diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm=
/hwprobe.h
> index 630507dff5ea..150a9877b0af 100644
> --- a/arch/riscv/include/asm/hwprobe.h
> +++ b/arch/riscv/include/asm/hwprobe.h
> @@ -8,7 +8,7 @@
>=20
>  #include <uapi/asm/hwprobe.h>
>=20
> -#define RISCV_HWPROBE_MAX_KEY 6
> +#define RISCV_HWPROBE_MAX_KEY 7
>=20
>  static inline bool riscv_hwprobe_key_is_valid(__s64 key)
>  {
> diff --git a/arch/riscv/include/uapi/asm/hwprobe.h=20
> b/arch/riscv/include/uapi/asm/hwprobe.h
> index 9f2a8e3ff204..a6da434be9da 100644
> --- a/arch/riscv/include/uapi/asm/hwprobe.h
> +++ b/arch/riscv/include/uapi/asm/hwprobe.h
> @@ -67,6 +67,7 @@ struct riscv_hwprobe {
>  #define		RISCV_HWPROBE_MISALIGNED_UNSUPPORTED	(4 << 0)
>  #define		RISCV_HWPROBE_MISALIGNED_MASK		(7 << 0)
>  #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE	6
> +#define RISCV_HWPROBE_KEY_MAX_USER_ADDRESS	7
>  /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
>=20
>  /* Flags */
> diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_h=
wprobe.c
> index a7c56b41efd2..19a47540b4a2 100644
> --- a/arch/riscv/kernel/sys_hwprobe.c
> +++ b/arch/riscv/kernel/sys_hwprobe.c
> @@ -8,6 +8,7 @@
>  #include <asm/cacheflush.h>
>  #include <asm/cpufeature.h>
>  #include <asm/hwprobe.h>
> +#include <asm/processor.h>
>  #include <asm/sbi.h>
>  #include <asm/switch_to.h>
>  #include <asm/uaccess.h>
> @@ -202,6 +203,9 @@ static void hwprobe_one_pair(struct riscv_hwprobe =
*pair,
>  		if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOZ))
>  			pair->value =3D riscv_cboz_block_size;
>  		break;
> +	case RISCV_HWPROBE_KEY_MAX_USER_ADDRESS:
> +		pair->value =3D arch_get_mmap_end(ULONG_MAX, 0, 0);
> +		break;
>=20
>  	/*
>  	 * For forward compatibility, unknown keys don't fail the whole
> --=20
> 2.43.0
>
>
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