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From: Thomas Gleixner <tglx@linutronix.de>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley
 <paul.walmsley@sifive.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof
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Subject: Re: [PATCH v13 07/13] irqchip/riscv-imsic: Add device MSI domain
 support for platform devices
In-Reply-To: <CAK9=C2V3hQnpibHgHUpwRXWn4LSuGue0a7Sh9NFYPB6XOizjoA@mail.gmail.com>
References: <20240220060718.823229-1-apatel@ventanamicro.com>
 <20240220060718.823229-8-apatel@ventanamicro.com> <875xyji7mc.ffs@tglx>
 <CAK9=C2V3hQnpibHgHUpwRXWn4LSuGue0a7Sh9NFYPB6XOizjoA@mail.gmail.com>
Date: Tue, 20 Feb 2024 18:12:41 +0100
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On Tue, Feb 20 2024 at 22:22, Anup Patel wrote:
> On Tue, Feb 20, 2024 at 7:02=E2=80=AFPM Thomas Gleixner <tglx@linutronix.=
de> wrote:
>>
>> On Tue, Feb 20 2024 at 11:37, Anup Patel wrote:
>> > +#ifdef CONFIG_SMP
>> > +static void imsic_msi_update_msg(struct irq_data *d, struct imsic_vec=
tor *vec)
>> > +{
>> > +     struct msi_msg msg[2] =3D { [1] =3D { }, };
>>
>> That's a weird initializer and why do you need an array here?
>>
>>        struct msi_msg msg =3D { };
>>
>> Should be sufficient, no?
>
> I had taken reference from irq_msi_update_msg() in
> arch/x86/kernel/apic/msi.c

Which is equally bogus :)

The charm of copy and pasta...

Thanks,

        tglx