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Wed, 21 Feb 2024 11:08:43 GMT Received: from [10.216.62.93] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 21 Feb 2024 03:08:37 -0800 Message-ID: <3a044447-375f-8f5d-1d4e-b421ed0a2c1f@quicinc.com> Date: Wed, 21 Feb 2024 16:38:34 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH 0/5] Add QPIC SPI NAND driver Content-Language: en-US To: Krzysztof Kozlowski , "Manivannan Sadhasivam" CC: , , , , , , , , , , , , , , , References: <20240215134856.1313239-1-quic_mdalam@quicinc.com> <20240219130412.GC3281@thinkpad> <3ad2909d-4ac3-fff3-739d-b12a3408fa0f@quicinc.com> <454a7e8d-70f5-4bf5-a3f1-bf9e42672c4c@linaro.org> From: Md Sadre Alam In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: heR9Ezb94gQFaWmjyfV8D6KObvJhplbf X-Proofpoint-GUID: heR9Ezb94gQFaWmjyfV8D6KObvJhplbf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-20_06,2024-02-21_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 bulkscore=0 mlxlogscore=815 clxscore=1015 mlxscore=0 malwarescore=0 impostorscore=0 priorityscore=1501 phishscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2402210086 On 2/21/2024 4:31 PM, Krzysztof Kozlowski wrote: > On 21/02/2024 11:34, Md Sadre Alam wrote: >> >> >> On 2/20/2024 5:06 PM, Krzysztof Kozlowski wrote: >>> On 20/02/2024 12:32, Md Sadre Alam wrote: >>>> >>>> >>>> On 2/19/2024 6:34 PM, Manivannan Sadhasivam wrote: >>>>> On Thu, Feb 15, 2024 at 07:18:51PM +0530, Md Sadre Alam wrote: >>>>>> This series of patches will add initial supports >>>>>> for QPIC SPI NAND driver. >>>>>> >>>>>> Currently this driver support following commands >>>>>> >>>>>> -- RESET >>>>>> -- READ ID >>>>>> -- BLOCK ERASE >>>>>> -- PAGE READ >>>>>> -- PAGE WRITE >>>>>> -- GET FEATURE >>>>>> -- SET FEATURE >>>>>> -- BAD BLOCK CHECK >>>>>> >>>>>> This driver has been tested with dd command with read/write page >>>>>> with multiple file size 1MiB, 10MiB,40MiB etc. >>>>>> Also tested with "mtd" command like mtd erase, mtd write, mtd verify etc. >>>>>> >>>>> >>>>> This is not the first version isn't it? Where is the changelog describing what >>>>> has changed since then? >>>> >>>> The earlier patch was the RFC for design review only. >>> >>> RFC is state of patch, not version. This is v2 then. >>> >>> These RFC postings are really becoming mess. Some people make multiple >>> RFCs and then post v1 hiding entire previous history... And why even >>> bother with calling it RFC? >> >> Sorry, I was not aware of this. Shall I post the next one as V3 >> and add references to the RFC patch and this patch in the cover >> letter of V3? > > Yes, like with every posting. Thank you. > > Best regards, > Krzysztof >