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AJvYcCWLLM/Kq5l1baN6okv1S5IG16uiDi53rL+3y9B9GlyCMuFZ0/r7TDAZihYbIOhmGul+D+UOuv/bMA28vJfZcTe8kOGeztvbn+apf25h X-Gm-Message-State: AOJu0YxkCI8YB3X3FqCVF5C6+kLnShnT0p4gmRN7DO/20hmt8GtxABdW zUVCBMmREBdeZ6+dKrQIkn/JRLL1wuOpc+V2yglhAVWnk6RyEt+AIu3HsRzLSz0wFR+vluL0Xir CcOT5TeHJWhTWAyQzWkReM6UWn80ZN2XGdovvvQ== X-Received: by 2002:a05:6512:3089:b0:512:ada6:f218 with SMTP id z9-20020a056512308900b00512ada6f218mr8741526lfd.59.1708522368449; Wed, 21 Feb 2024 05:32:48 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240220060718.823229-1-apatel@ventanamicro.com> <20240220060718.823229-4-apatel@ventanamicro.com> <87cysrigud.ffs@tglx> In-Reply-To: <87cysrigud.ffs@tglx> From: Anup Patel Date: Wed, 21 Feb 2024 19:02:37 +0530 Message-ID: Subject: Re: [PATCH v13 03/13] irqchip/riscv-intc: Add support for RISC-V AIA To: Thomas Gleixner Cc: Palmer Dabbelt , Paul Walmsley , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley , Marc Zyngier , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , Atish Patra , Andrew Jones , Sunil V L , Saravana Kannan , Anup Patel , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Feb 20, 2024 at 3:43=E2=80=AFPM Thomas Gleixner wrote: > > On Tue, Feb 20 2024 at 11:37, Anup Patel wrote: > > > The RISC-V advanced interrupt architecture (AIA) extends the per-HART > > local interrupts in following ways: > > 1. Minimum 64 local interrupts for both RV32 and RV64 > > 2. Ability to process multiple pending local interrupts in same > > interrupt handler > > 3. Priority configuration for each local interrupts > > 4. Special CSRs to configure/access the per-HART MSI controller > > > > We add support for #1 and #2 described above in the RISC-V intc > > driver. > > S/We add/Add/ Okay, I will update. > > > +static asmlinkage void riscv_intc_aia_irq(struct pt_regs *regs) > > +{ > > + unsigned long topi; > > + > > + while ((topi =3D csr_read(CSR_TOPI))) > > + generic_handle_domain_irq(intc_domain, > > + topi >> TOPI_IID_SHIFT); > > Please let it stick out. You got 100 characters. All over the place. Okay, I will update. Regards, Anup