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Wed, 21 Feb 2024 20:34:47 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Andy Shevchenko , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Jiri Slaby , Joel Stanley , Andrew Jeffery , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Al Cooper , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Paul Cercueil , Vladimir Zapolskiy , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu Subject: [PATCH v1 13/14] serial: 8250_tegra: Switch to use uart_read_port_properties() Date: Wed, 21 Feb 2024 20:31:29 +0200 Message-ID: <20240221183442.4124354-14-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> References: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Since we have now a common helper to read port properties use it instead of sparse home grown solution. Signed-off-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_tegra.c | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/drivers/tty/serial/8250/8250_tegra.c b/drivers/tty/serial/8250/8250_tegra.c index ba352262df75..ce48d02dfa0d 100644 --- a/drivers/tty/serial/8250/8250_tegra.c +++ b/drivers/tty/serial/8250/8250_tegra.c @@ -57,25 +57,11 @@ static int tegra_uart_probe(struct platform_device *pdev) port = &port8250.port; spin_lock_init(&port->lock); - port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | - UPF_FIXED_TYPE; - port->iotype = UPIO_MEM32; - port->regshift = 2; + port->flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE; port->type = PORT_TEGRA; - port->irqflags |= IRQF_SHARED; port->dev = &pdev->dev; port->handle_break = tegra_uart_handle_break; - ret = of_alias_get_id(pdev->dev.of_node, "serial"); - if (ret >= 0) - port->line = ret; - - ret = platform_get_irq(pdev, 0); - if (ret < 0) - return ret; - - port->irq = ret; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) return -ENODEV; @@ -88,12 +74,18 @@ static int tegra_uart_probe(struct platform_device *pdev) port->mapbase = res->start; port->mapsize = resource_size(res); + ret = uart_read_port_properties(port, true); + if (ret) + return ret; + + port->iotype = UPIO_MEM32; + port->regshift = 2; + uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL); if (IS_ERR(uart->rst)) return PTR_ERR(uart->rst); - if (device_property_read_u32(&pdev->dev, "clock-frequency", - &port->uartclk)) { + if (!port->uartclk) { uart->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(uart->clk)) { dev_err(&pdev->dev, "failed to get clock!\n"); -- 2.43.0.rc1.1.gbec44491f096