Received-SPF: pass (google.com: domain of linux-kernel+bounces-75935-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1;
Date: Thu, 22 Feb 2024 10:52:22 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: root <root@hu-msarkar-hyd.qualcomm.com>
Cc: andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	konrad.dybcio@linaro.org, conor+dt@kernel.org,
	quic_nitegupt@quicinc.com, quic_shazhuss@quicinc.com,
	quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com,
	quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
	Mrinmay Sarkar <quic_msarkar@quicinc.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= <kw@linux.com>,
	Rob Herring <robh@kernel.org>, linux-arm-msm@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, shradha.t@samsung.com
Subject: Re: [PATCH v1 0/3] Add support for detecting Controller Level PCIe
 Errors
Message-ID: <20240222052222.GE3374@thinkpad>
References: <20240221140405.28532-1-root@hu-msarkar-hyd.qualcomm.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Disposition: inline
Content-Transfer-Encoding: 8bit
In-Reply-To: <20240221140405.28532-1-root@hu-msarkar-hyd.qualcomm.com>

+ Shradha

On Wed, Feb 21, 2024 at 07:34:01PM +0530, root wrote:
> From: Mrinmay Sarkar <quic_msarkar@quicinc.com>
> 

You are sending the patches from a wierd account. Please fix it.

> Synopsys Controllers provide capabilities to detect various controller
> level errors. These can range from controller interface error to random
> PCIe configuration errors. This patch intends to add support to detect
> these errors and report it to userspace entity via sysfs, which can take
> appropriate actions to mitigate the errors.
> 
> Also adding global irq support for PCIe RC and add corresponding change
> in PCIe dt-bindings.
> 

There is already a series submitted to add RAS support to DWC drivers [1] and
I've provided comments to check with EDAC maintainers on using the EDAC
framework. If they don't see this as a fit for their subsystem, then we can add
it in DWC drivers.

- Mani

[1] https://lore.kernel.org/all/20231130165514.GW3043@thinkpad/

> Mrinmay Sarkar (2):
>   dt-bindings: PCI: qcom: Add global irq support for SA8775p
>   arm64: dts: qcom: sa8775p: Enable global irq support for SA8775p
> 
> Nitesh Gupta (1):
>   PCI: qcom: Add support for detecting Controller Level PCIe Errors
> 
>  .../devicetree/bindings/pci/qcom,pcie.yaml    |  26 +-
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi         |  12 +-
>  drivers/pci/controller/dwc/pcie-designware.h  |  26 ++
>  drivers/pci/controller/dwc/pcie-qcom.c        | 350 ++++++++++++++++++
>  4 files changed, 408 insertions(+), 6 deletions(-)
> 
> -- 
> 2.40.1
> 

-- 
மணிவண்ணன் சதாசிவம்