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Thu, 22 Feb 2024 06:51:46 -0700 From: Rengarajan S To: , , , , , , CC: Subject: [PATCH v1 tty] 8250: microchip: pci1xxxx: Refactor TX Burst code to use pre-existing APIs Date: Thu, 22 Feb 2024 19:19:44 +0530 Message-ID: <20240222134944.1131952-1-rengarajan.s@microchip.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Updated the TX Burst implementation by changing the circular buffer processing with the pre-existing APIs in kernel. Also updated conditional statements and alignment issues for better readability. Signed-off-by: Rengarajan S --- drivers/tty/serial/8250/8250_pci1xxxx.c | 39 ++++++++++++------------- 1 file changed, 19 insertions(+), 20 deletions(-) diff --git a/drivers/tty/serial/8250/8250_pci1xxxx.c b/drivers/tty/serial/8250/8250_pci1xxxx.c index 6cfeba058dba..84e0a0725f41 100644 --- a/drivers/tty/serial/8250/8250_pci1xxxx.c +++ b/drivers/tty/serial/8250/8250_pci1xxxx.c @@ -374,7 +374,7 @@ static void pci1xxxx_rx_burst(struct uart_port *port, u32 uart_status) static void pci1xxxx_process_write_data(struct uart_port *port, struct circ_buf *xmit, - int *data_empty_count, + u32 *data_empty_count, u32 *valid_byte_count) { u32 valid_burst_count = *valid_byte_count / UART_BURST_SIZE; @@ -386,22 +386,24 @@ static void pci1xxxx_process_write_data(struct uart_port *port, * one byte at a time. */ while (valid_burst_count) { - if (*data_empty_count - UART_BURST_SIZE < 0) + if (*data_empty_count < UART_BURST_SIZE) break; - if (xmit->tail > (UART_XMIT_SIZE - UART_BURST_SIZE)) + + if (CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE) < + UART_BURST_SIZE) break; - writel(*(unsigned int *)&xmit->buf[xmit->tail], + + writel(*(u32 *)&xmit->buf[xmit->tail], port->membase + UART_TX_BURST_FIFO); *valid_byte_count -= UART_BURST_SIZE; *data_empty_count -= UART_BURST_SIZE; valid_burst_count -= UART_BYTE_SIZE; - xmit->tail = (xmit->tail + UART_BURST_SIZE) & - (UART_XMIT_SIZE - 1); + uart_xmit_advance(port, UART_BURST_SIZE); } while (*valid_byte_count) { - if (*data_empty_count - UART_BYTE_SIZE < 0) + if (*data_empty_count < UART_BYTE_SIZE) break; writeb(xmit->buf[xmit->tail], port->membase + UART_TX_BYTE_FIFO); @@ -412,8 +414,7 @@ static void pci1xxxx_process_write_data(struct uart_port *port, * When the tail of the circular buffer is reached, the next * byte is transferred to the beginning of the buffer. */ - xmit->tail = (xmit->tail + UART_BYTE_SIZE) & - (UART_XMIT_SIZE - 1); + uart_xmit_advance(port, UART_BYTE_SIZE); /* * If there are any pending burst count, data is handled by @@ -434,16 +435,7 @@ static void pci1xxxx_tx_burst(struct uart_port *port, u32 uart_status) xmit = &port->state->xmit; - if (port->x_char) { - writeb(port->x_char, port->membase + UART_TX); - port->icount.tx++; - port->x_char = 0; - return; - } - - if ((uart_tx_stopped(port)) || (uart_circ_empty(xmit))) { - port->ops->stop_tx(port); - } else { + if (!(port->x_char)) { data_empty_count = (pci1xxxx_read_burst_status(port) & UART_BST_STAT_TX_COUNT_MASK) >> 8; do { @@ -453,15 +445,22 @@ static void pci1xxxx_tx_burst(struct uart_port *port, u32 uart_status) &data_empty_count, &valid_byte_count); - port->icount.tx++; if (uart_circ_empty(xmit)) break; } while (data_empty_count && valid_byte_count); + } else { + writeb(port->x_char, port->membase + UART_TX); + port->icount.tx++; + port->x_char = 0; + return; } if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) uart_write_wakeup(port); + if ((uart_tx_stopped(port)) || (uart_circ_empty(xmit))) + port->ops->stop_tx(port); + /* * With RPM enabled, we have to wait until the FIFO is empty before * the HW can go idle. So we get here once again with empty FIFO and -- 2.25.1