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bh=96hpAVVd+xDK8y/C86u/coOa7UxUdqcJBdcPH5BU3ro=; b=POS1hNcWJqVAiasbvYg6kMJ7WvPzdZzimwynLOxRwovAb4QLx7qYCDg1 XMvVidUUjHswnnZ8JPVZBtNnxe8ssxY5M8ynkg7UAj/xbJPcQnXJKMXay NBVV1knmxRno53/z2LDvGD/hxp6jjI57R31UdT0NX6BHpNhXlWNx5IrKe r8Xw78IhdW74KnRTIQhDem7Nc3+yD3CXqdFDa9bBO6/2yAnzu7IyfF0f2 pofw7OHXw/b1rLCsPWtwdXo7Nb9vfg6duKCTt9gucz/DUnpLOJ4viTNcw Pdn8cNFJ7PKbQVjg8ubYFH4NUW5Gwb5YEnuHCrptwJ5zHbGi+yE4pPSSS Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10992"; a="6697386" X-IronPort-AV: E=Sophos;i="6.06,179,1705392000"; d="scan'208";a="6697386" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Feb 2024 10:28:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,179,1705392000"; d="scan'208";a="5552427" Received: from djiang5-mobl3.amr.corp.intel.com (HELO [10.246.114.198]) ([10.246.114.198]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Feb 2024 10:28:32 -0800 Message-ID: Date: Thu, 22 Feb 2024 11:28:32 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] cxl/trace: Fix uncorrectable macro spelling Content-Language: en-US To: Ira Weiny , Davidlohr Bueso , Jonathan Cameron , Alison Schofield , Vishal Verma , Dan Williams Cc: linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240221-fix-correctable-macro-v1-1-6e6ab8b8aa39@intel.com> From: Dave Jiang In-Reply-To: <20240221-fix-correctable-macro-v1-1-6e6ab8b8aa39@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 2/21/24 9:52 PM, Ira Weiny wrote: > Uncorrectable is spelled with two r's. > > Fix the macro spelling. > > Signed-off-by: Ira Weiny Reviewed-by: Dave Jiang > --- > drivers/cxl/core/trace.h | 4 ++-- > tools/testing/cxl/test/mem.c | 2 +- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h > index bdf117a33744..577a01954f71 100644 > --- a/drivers/cxl/core/trace.h > +++ b/drivers/cxl/core/trace.h > @@ -267,11 +267,11 @@ TRACE_EVENT(cxl_generic_event, > * General Media Event Record - GMER > * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43 > */ > -#define CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT BIT(0) > +#define CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT BIT(0) > #define CXL_GMER_EVT_DESC_THRESHOLD_EVENT BIT(1) > #define CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW BIT(2) > #define show_event_desc_flags(flags) __print_flags(flags, "|", \ > - { CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT, "UNCORRECTABLE_EVENT" }, \ > + { CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT, "UNCORRECTABLE_EVENT" }, \ > { CXL_GMER_EVT_DESC_THRESHOLD_EVENT, "THRESHOLD_EVENT" }, \ > { CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW, "POISON_LIST_OVERFLOW" } \ > ) > diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c > index 35ee41e435ab..c0c1e6b4db75 100644 > --- a/tools/testing/cxl/test/mem.c > +++ b/tools/testing/cxl/test/mem.c > @@ -380,7 +380,7 @@ struct cxl_test_gen_media gen_media = { > .related_handle = cpu_to_le16(0), > }, > .phys_addr = cpu_to_le64(0x2000), > - .descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT, > + .descriptor = CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT, > .type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR, > .transaction_type = CXL_GMER_TRANS_HOST_WRITE, > /* .validity_flags = */ > > --- > base-commit: a2cd3520e6085b0f9145d9c5e3d1bfa9cce4c3be > change-id: 20240102-fix-correctable-macro-2847ce932c9c > > Best regards,