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Thu, 22 Feb 2024 11:17:23 -0800 Received: from dc3lp-swdev041.marvell.com (dc3lp-swdev041.marvell.com [10.6.60.191]) by maili.marvell.com (Postfix) with ESMTP id 2A7923F718D; Thu, 22 Feb 2024 11:17:20 -0800 (PST) From: Elad Nachman To: , , , , CC: Subject: [PATCH v3 0/2] Fix PHY init timeout issues Date: Thu, 22 Feb 2024 21:17:12 +0200 Message-ID: <20240222191714.1216470-1-enachman@marvell.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: IAP0YGiOzlM2mvAqO6ZuH5uIWA9G2meI X-Proofpoint-ORIG-GUID: IAP0YGiOzlM2mvAqO6ZuH5uIWA9G2meI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_15,2024-02-22_01,2023-05-22_02 From: Elad Nachman Fix PHY init timeout issues: 1. Clock Stability issue causing PHY timeout 2. Timeout taking longer than needed on AC5X. Solve by constantly testing the PHY init bit until it toggles, but up to 100X timeout factor. v2: 1) convert polling loop to read_poll_timeout() for both patches. v3: 1) Add Acked-by, Fixes and CC for stable Elad Nachman (2): mmc: xenon: fix PHY init clock stability mmc: xenon: add timeout for PHY init complete drivers/mmc/host/sdhci-xenon-phy.c | 48 ++++++++++++++++++++++++------ 1 file changed, 39 insertions(+), 9 deletions(-) -- 2.25.1