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AJvYcCUvO1Y5QF2IMycM4uJYtqtEejzd8ACrwI0CosS6Qnzy9R946RUXcfKYSca/0+XzcbxtII2tkK9Ei0Wrtag5HAxUIaxZyJFX5DWJSQkZ X-Gm-Message-State: AOJu0YxGzFF7tEhOBrxEZ47W1UYgA2Z/wqtlOQEHdHQQluHy/bCg5FbF vF5sMSQekLYChGgjo+r9mO9daxNwQTGgfKa1u5vbSNIzKfsiuLosIwSK+a362IrPLgVOXQB71fd 2DP9OoCxsytBakC4CE4/n6ibQJ/RghEFM3ZrV X-Received: by 2002:ac2:4249:0:b0:512:c1ba:9115 with SMTP id m9-20020ac24249000000b00512c1ba9115mr562755lfl.57.1708662460080; Thu, 22 Feb 2024 20:27:40 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240108081834.408403-1-treapking@chromium.org> In-Reply-To: <20240108081834.408403-1-treapking@chromium.org> From: Chen-Yu Tsai Date: Fri, 23 Feb 2024 12:27:28 +0800 Message-ID: Subject: Re: [PATCH v3 1/2] clk: mediatek: Introduce need_pm_runtime to mtk_clk_desc To: Pin-yen Lin Cc: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Weiyi Lu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Jan 8, 2024 at 4:18=E2=80=AFPM Pin-yen Lin = wrote: > > Introduce a new need_pm_runtime variable to mtk_clk_desc to indicate > this clock controller needs runtime PM for its operations. > Also do a runtime PM get on the clock controller during the > probing stage to workaround a possible deadlock. > > Signed-off-by: Pin-yen Lin Reviewed-by: Chen-Yu Tsai The patch itself looks fine. Besides the MT8183 MFG clock issues, we do actually need this for the MT8192 ADSP clock. Its power domain is not enabled by default. > --- > > Changes in v3: > - Update the commit message and the comments before runtime PM call > > Changes in v2: > - Fix the order of error handling > - Update the commit message and add a comment before the runtime PM call > > drivers/clk/mediatek/clk-mtk.c | 19 +++++++++++++++++++ > drivers/clk/mediatek/clk-mtk.h | 2 ++ > 2 files changed, 21 insertions(+) > > diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mt= k.c > index 2e55368dc4d8..ba1d1c495bc2 100644 > --- a/drivers/clk/mediatek/clk-mtk.c > +++ b/drivers/clk/mediatek/clk-mtk.c > @@ -13,6 +13,7 @@ > #include > #include > #include > +#include > #include > > #include "clk-mtk.h" > @@ -494,6 +495,18 @@ static int __mtk_clk_simple_probe(struct platform_de= vice *pdev, > return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM; > } > > + > + if (mcd->need_runtime_pm) { > + devm_pm_runtime_enable(&pdev->dev); > + /* > + * Do a pm_runtime_resume_and_get() to workaround a possi= ble > + * deadlock between clk_register() and the genpd framewor= k. > + */ > + r =3D pm_runtime_resume_and_get(&pdev->dev); > + if (r) > + return r; > + } > + > /* Calculate how many clk_hw_onecell_data entries to allocate */ > num_clks =3D mcd->num_clks + mcd->num_composite_clks; > num_clks +=3D mcd->num_fixed_clks + mcd->num_factor_clks; > @@ -574,6 +587,9 @@ static int __mtk_clk_simple_probe(struct platform_dev= ice *pdev, > goto unregister_clks; > } > > + if (mcd->need_runtime_pm) > + pm_runtime_put(&pdev->dev); > + > return r; > > unregister_clks: > @@ -604,6 +620,9 @@ static int __mtk_clk_simple_probe(struct platform_dev= ice *pdev, > free_base: > if (mcd->shared_io && base) > iounmap(base); > + > + if (mcd->need_runtime_pm) > + pm_runtime_put(&pdev->dev); > return r; > } > > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mt= k.h > index 22096501a60a..c17fe1c2d732 100644 > --- a/drivers/clk/mediatek/clk-mtk.h > +++ b/drivers/clk/mediatek/clk-mtk.h > @@ -237,6 +237,8 @@ struct mtk_clk_desc { > > int (*clk_notifier_func)(struct device *dev, struct clk *clk); > unsigned int mfg_clk_idx; > + > + bool need_runtime_pm; > }; > > int mtk_clk_pdev_probe(struct platform_device *pdev); > -- > 2.43.0.472.g3155946c3a-goog >