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a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1708676920; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=BwouyOLbHz0eSzCdVQ2ZEsHOl10HJAxDGKDUKAL7Owk=; b=cfpLw9z8ATpZPiDKbtK60qO0kt54LwXCDHCurRp/6YD+12HSf3uBMKcklWFSACBsIAxbZM Gzfu7GBoQALfc6TLvIv0sA1guMwPM1uuqE9ljEfvOCL+t/mFIJS9LoqM+Nrund9/hzgi5j NfmMx2yL3j+NnrOvGGiCU+bV3Gnd3EHGyZzoLj/W2+x1kPFVT4TMMVCQHyWgYLQAMm/Xvn zimTWHdPfiHFuIegAswCFXw2TyvjkBhZz4FP3RrLqN9Lkjxp+jNtZV+vSS3HJ2R8h2Imie ueoCgOrGxcBKRnuUhqh8vbbkwa1uwYJDjPGCjLVbTu9Pwq29j3kFH55YWqmSTQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1708676920; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=BwouyOLbHz0eSzCdVQ2ZEsHOl10HJAxDGKDUKAL7Owk=; b=Gonh+AQTnZOB2EGMkKzwClO38MRD1hddXVrDFhRCeIADXpMKUQUubjPqRKqdqGquOcIx80 7n/i+HaywMLdrGAw== To: Anup Patel , Palmer Dabbelt , Paul Walmsley , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley Cc: Marc Zyngier , =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= , Atish Patra , Andrew Jones , Sunil V L , Saravana Kannan , Anup Patel , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: Re: [PATCH v14 11/18] irqchip: Add RISC-V incoming MSI controller early driver In-Reply-To: <20240222094006.1030709-12-apatel@ventanamicro.com> References: <20240222094006.1030709-1-apatel@ventanamicro.com> <20240222094006.1030709-12-apatel@ventanamicro.com> Date: Fri, 23 Feb 2024 09:28:39 +0100 Message-ID: <87a5nreg94.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Thu, Feb 22 2024 at 15:09, Anup Patel wrote: > + /* > + * Setup cpuhp state (must be done after setting imsic_parent_irq) > + * > + * Don't disable per-CPU IMSIC file when CPU goes offline > + * because this affects IPI and the masking/unmasking of > + * virtual IPIs is done via generic IPI-Mux > + */ > + cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "irqchip/riscv/imsic:starting", > + imsic_starting_cpu, imsic_dying_cpu); This is not really correct. IPIs should be working right away when a CPU comes online and on the unplug side until it really goes offline. So this wants to be in the starting range, i.e. between CPUHP_AP_OFFLINE and CPUHP_AP_ONLINE. No? Thanks, tglx