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a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1708678489; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=zrx67e+Ks02+zDid4MN+n+m4AfW7G8yFrILIPbdnNa4=; b=UaO4+edaAlRkEF1meSANixfmhiR1danHJMIoI4bWIlEjqMxlificuKVRiZjKRI34uK+/hk yov6A0AAylIj/5+xhEkh25rs/R5t1D0FnBd6XiLZHZws8ZndsF4Fx6/BRPnb9WiijW74wC awhDyB/C7rcWplgSzNGGRzKEdbwcmqq3WDPnGbLr42NCF1DXy7P/ggZbu6FT5xUcsNXGKG aWIUlN84e44uMKNJRSTu+RlK+p7CZzXgzQbdwe7UDpsvjKIfxUfXcFI+qIbJQboXX/1e0j DYYGgINgTShkLB7bcNMk/4SsS/Av095OpICDU2bdXJIq759Vi3dSngtB86Wrsw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1708678489; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=zrx67e+Ks02+zDid4MN+n+m4AfW7G8yFrILIPbdnNa4=; b=RY0/77R84x+3anj5rVqtXr7nePncBV1qdEK0MqIR9HQ97lVwGiQRJSrwrJwrBASYJ6hOj/ v2mgwGRxCXg66LAA== To: Yu Chien Peter Lin , acme@kernel.org, adrian.hunter@intel.com, ajones@ventanamicro.com, alexander.shishkin@linux.intel.com, andre.przywara@arm.com, anup@brainfault.org, aou@eecs.berkeley.edu, atishp@atishpatra.org, conor+dt@kernel.org, conor.dooley@microchip.com, conor@kernel.org, devicetree@vger.kernel.org, evan@rivosinc.com, geert+renesas@glider.be, guoren@kernel.org, heiko@sntech.de, irogers@google.com, jernej.skrabec@gmail.com, jolsa@kernel.org, jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev, locus84@andestech.com, magnus.damm@gmail.com, mark.rutland@arm.com, mingo@redhat.com, n.shubin@yadro.com, namhyung@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, peterlin@andestech.com, peterz@infradead.org, prabhakar.mahadev-lad.rj@bp.renesas.com, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, sunilvl@ventanamicro.com, tim609@andestech.com, uwu@icenowy.me, wens@csie.org, will@kernel.org, inochiama@outlook.com, unicorn_wang@outlook.com, wefu@redhat.com Cc: Randolph Subject: Re: [PATCH v9 03/10] irqchip/riscv-intc: Introduce Andes hart-level interrupt controller In-Reply-To: <877civefa5.ffs@tglx> References: <20240222083946.3977135-1-peterlin@andestech.com> <20240222083946.3977135-4-peterlin@andestech.com> <87o7c8dvv4.ffs@tglx> <877civefa5.ffs@tglx> Date: Fri, 23 Feb 2024 09:54:48 +0100 Message-ID: <874jdzef1j.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Fri, Feb 23 2024 at 09:49, Thomas Gleixner wrote: > On Thu, Feb 22 2024 at 22:36, Thomas Gleixner wrote: >> Palmer, feel free to take this through the riscv tree. I have no other >> changes pending against that driver. > > Aargh. Spoken too early. This conflicts with Anups AIA series. > > https://lore.kernel.org/all/20240222094006.1030709-1-apatel@ventanamicro.com > > So I rather take the pile through my tree and deal with the conflicts > localy than inflicting it on next. > Palmer? Nah. I just apply the two intc patches localy and give you a tag to pull from so we carry both the same commits. Then I can deal with the conflicts on my side trivially. Thanks, tglx