Received: by 2002:a05:7412:798b:b0:fc:a2b0:25d7 with SMTP id fb11csp851338rdb; Fri, 23 Feb 2024 01:51:20 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCUkNkLXazDNoyytVnp5YgUqqlSREIoL3s9yCf+dguRBowELI+GWtpDn7uy1b2ZieAwB9kuef24iRrjyApLNINxUfhskH05mNk2OBbN8yw== X-Google-Smtp-Source: AGHT+IFhLyqvnT/Us8wNHT+H1QzEkBQnNgln8aHm86/c4wwgP8jWu7xF9ZU3m+ru86mOOg/kwls1 X-Received: by 2002:a17:90a:4a8b:b0:299:9d8:d7c9 with SMTP id f11-20020a17090a4a8b00b0029909d8d7c9mr1195325pjh.18.1708681880326; Fri, 23 Feb 2024 01:51:20 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708681880; cv=pass; d=google.com; s=arc-20160816; b=SUMtIdzWPctK6o8Rnhcrv8v+oG5xARLRGu5qhLJ6y35ksD3RBb9iTMlzUBqR+wWn8y 4jcDR4bS1qNYonoPpzO44UJjHVEzc4aO5JrZqoHB8xmXyLVvRV9mC0cdj0KtAOCbxfWV 0O0dJvqm8mmILlySKa4s/Aqz5xN8uTQDk6raxep6my6jO67iNrBtdbSAIMhh7lNS+EaE TDQ8byW6McAB/pDfKC0arsYGRYr0NcHyN1vd4nzRghRD5o78nHW6V8gc6aPPuSw6V0Ew /hQmZswy7tj/yf7D/91ozB/eXYOeFOwC5+wql4S6TSujOZS1mWYZXGO/HvXACTlBNRY9 jnew== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:precedence:robot-unsubscribe:robot-id :message-id:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:in-reply-to:cc:subject:to:reply-to:sender :from:dkim-signature:dkim-signature:date; bh=VAHbqt8rQSPOA2HvT+YVJ6OL/lZfbAgvAFtu3HB+cNg=; fh=546OEPtoZUYjWwSPOd/hX3L3p6biPmSjgTUnSRYaJpA=; b=q5pUb1IZK5HAizVymUhmzNZER9TSPxFbHRUvOxf3w0YU22QkjeNiFeUbxcUgmj6sq1 nt6ii0zQKq0IEDlWyyVBd/MH5Tk+bgyQ5yemQ4rQqIWeqTauZFRE5JFJMf9puAeBX06n M2Nt+ovmdY94WSutUJwYAb0h7M/sPXUG4jyUK7CYC1qr8vz5dLiAEuxpmCqra5mzaFOi RVy1BytMAtq9IRG9zls87Doyxnnnj2c/moClGZF3OvYrTvfdqaYbn9uqn72xs6wThR36 tZtD2EZTuI575senMt+qoVAUQkKfDSToz9yFZReSZwApX1060IjgD6OdX58Y2xyTo2v8 OuLw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="InYV/0Rg"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-78051-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-78051-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Return-Path: Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [147.75.48.161]) by mx.google.com with ESMTPS id s1-20020a17090aad8100b002991777134bsi867734pjq.38.2024.02.23.01.51.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Feb 2024 01:51:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-78051-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="InYV/0Rg"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-78051-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-78051-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 8D602B21CB9 for ; Fri, 23 Feb 2024 09:44:43 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 83CA95D49C; Fri, 23 Feb 2024 09:44:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="InYV/0Rg"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="1+zvP+/1" Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C19C25C91A; Fri, 23 Feb 2024 09:44:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708681444; cv=none; b=Gd2tAskB1Yb9XSL8zrkxF+387xfY5uJkF9P+wKJfdx4cwVmN5VGCjq4PLCSBdtDrtVndrteICpWxONFC3dolFqv1RpSE4up+K6dHt1VIVCWczFmOSBjNYgmRRsnj61R6HKi7mFixRTJpZwGGvna61CTZ3xMxgDj/oXUJUnRltPA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708681444; c=relaxed/simple; bh=xP1QMBHBnX7txEiz3JN13nwfnUgIJKwzU6gITrTpne4=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=tB6NvIDiuEwg/urYqpvyuA3xyVSN0LxHMrkO3iJQbQFyf095h2ATHRbW2P6+HyOYeOaescyd4gcFcDYRxla17fmh6OY+0kR5qqDRzHJ1+a3HGv0qzss7NtLMoLUE7etQPAOM6c4F2ANAG0SA2/Bf4OmiW9O7BYm8Smni4qglUq8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=InYV/0Rg; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=1+zvP+/1; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Date: Fri, 23 Feb 2024 09:43:54 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1708681434; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VAHbqt8rQSPOA2HvT+YVJ6OL/lZfbAgvAFtu3HB+cNg=; b=InYV/0Rgmw8PeLD6QTiQu9lhUvZXso96HBCS95LjwmXBrU71Is9xkjwt9878JxlQsVDyZ4 QfDkO22e5sbu735n6k9bvGCZCgEHs1S7xaQWVIvJnmnX1HrSi3EJnfYrS2eV1bzDfHQmCb Qog8D/aUGCEQBvnGR6riMNmKG+DrpAbh85UAiIS7Pu4IyFoCHasoN3oH0BTH4PBYItJ63+ D4/J/EbCG0j0t5PmUcSR9FeqyDZiOFaQb3oBCyTTrkaTfWdzXG53q9A/tdXwIbUbkg68iT W6cDD5VP3O79ZQ8A3SHnx74tCgbQaozO//eMexE5sEIkPWdWAttxCIxH9McT9Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1708681434; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VAHbqt8rQSPOA2HvT+YVJ6OL/lZfbAgvAFtu3HB+cNg=; b=1+zvP+/1bSRaYdZD7v5IbSd2vyoW5eL1eMMYx6NaWv6kE2XnN0N5iBElGmn+2nl3A8nTGu SIAmE8h9FcTvNoCQ== From: "tip-bot2 for Anup Patel" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/msi] irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe() Cc: Anup Patel , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240222094006.1030709-7-apatel@ventanamicro.com> References: <20240222094006.1030709-7-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <170868143403.398.1806515246389747048.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit The following commit has been merged into the irq/msi branch of tip: Commit-ID: 95652106478030f54620b1f0d28f78ab110b3212 Gitweb: https://git.kernel.org/tip/95652106478030f54620b1f0d28f78ab110b3212 Author: Anup Patel AuthorDate: Thu, 22 Feb 2024 15:09:54 +05:30 Committer: Thomas Gleixner CommitterDate: Fri, 23 Feb 2024 10:18:44 +01:00 irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe() The SiFive PLIC driver needs to know the number of interrupts and contexts to complete initialization. Parse these details early in plic_probe() to avoid unnecessary memory allocations and register mappings if these details are not available. Signed-off-by: Anup Patel Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/20240222094006.1030709-7-apatel@ventanamicro.com --- drivers/irqchip/irq-sifive-plic.c | 43 +++++++++++++++++++++++------- 1 file changed, 33 insertions(+), 10 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index a399cb3..474ddc3 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -417,6 +417,34 @@ static const struct of_device_id plic_match[] = { {} }; +static int plic_parse_nr_irqs_and_contexts(struct platform_device *pdev, + u32 *nr_irqs, u32 *nr_contexts) +{ + struct device *dev = &pdev->dev; + int rc; + + /* + * Currently, only OF fwnode is supported so extend this + * function for ACPI support. + */ + if (!is_of_node(dev->fwnode)) + return -EINVAL; + + rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", nr_irqs); + if (rc) { + dev_err(dev, "riscv,ndev property not available\n"); + return rc; + } + + *nr_contexts = of_irq_count(to_of_node(dev->fwnode)); + if (WARN_ON(!(*nr_contexts))) { + dev_err(dev, "no PLIC context available\n"); + return -EINVAL; + } + + return 0; +} + static int plic_parse_context_parent(struct platform_device *pdev, u32 context, u32 *parent_hwirq, int *parent_cpu) { @@ -465,31 +493,26 @@ static int plic_probe(struct platform_device *pdev) plic_quirks = (unsigned long)id->data; } + error = plic_parse_nr_irqs_and_contexts(pdev, &nr_irqs, &nr_contexts); + if (error) + return error; + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; priv->dev = dev; priv->plic_quirks = plic_quirks; + priv->nr_irqs = nr_irqs; priv->regs = devm_platform_ioremap_resource(pdev, 0); if (WARN_ON(!priv->regs)) return -EIO; - of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", &nr_irqs); - if (WARN_ON(!nr_irqs)) - return -EINVAL; - - priv->nr_irqs = nr_irqs; - priv->prio_save = devm_bitmap_zalloc(dev, nr_irqs, GFP_KERNEL); if (!priv->prio_save) return -ENOMEM; - nr_contexts = of_irq_count(to_of_node(dev->fwnode)); - if (WARN_ON(!nr_contexts)) - return -EINVAL; - for (i = 0; i < nr_contexts; i++) { error = plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu); if (error) {