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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On 22-02-24, 08:48, Shengyang Chen wrote: > Hi, Vinod > > Thanks for review and comment. > > > -----Original Message----- > > From: Vinod Koul > > Sent: 2024年2月7日 18:36 > > To: Shengyang Chen > > Cc: devicetree@vger.kernel.org; linux-phy@lists.infradead.org; > > kishon@kernel.org; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > > conor+dt@kernel.org; p.zabel@pengutronix.de; Minda Chen > > ; Changhuang Liang > > ; rogerq@kernel.org; > > geert+renesas@glider.be; Keith Zhao ; > > linux-kernel@vger.kernel.org > > Subject: Re: [PATCH v3 2/2] phy: starfive: Add mipi dphy tx support > > > > On 06-02-24, 14:19, Shengyang Chen wrote: > > > Add mipi dphy tx support for the StarFive JH7110 SoC. > > > It is a module which is used to receive data from DSI driver and > > > transfer data to DSI interface like mipi screen. > > > > > > Signed-off-by: Shengyang Chen > > > --- > > > MAINTAINERS | 7 + > > > drivers/phy/starfive/Kconfig | 10 + > > > drivers/phy/starfive/Makefile | 1 + > > > drivers/phy/starfive/phy-jh7110-dphy-tx.c | 635 > > > ++++++++++++++++++++++ > > > 4 files changed, 653 insertions(+) > > > create mode 100644 drivers/phy/starfive/phy-jh7110-dphy-tx.c > > > > > > diff --git a/MAINTAINERS b/MAINTAINERS index > > > 944b8ec33639..5e062b7393cb 100644 > > > --- a/MAINTAINERS > > > +++ b/MAINTAINERS > > > @@ -20864,6 +20864,13 @@ S: Supported > > > F: Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml > > > F: drivers/phy/starfive/phy-jh7110-dphy-rx.c > > > > > > +STARFIVE JH7110 DPHY TX DRIVER > > > +M: Keith Zhao > > > +M: Shengyang Chen > > > +S: Supported > > > +F: Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-tx.yaml > > > +F: drivers/phy/starfive/phy-jh7110-dphy-tx.c > > > + > > > STARFIVE JH7110 MMC/SD/SDIO DRIVER > > > M: William Qiu > > > S: Supported > > > diff --git a/drivers/phy/starfive/Kconfig > > > b/drivers/phy/starfive/Kconfig index 9508e2143011..d0cdd7cb4a13 100644 > > > --- a/drivers/phy/starfive/Kconfig > > > +++ b/drivers/phy/starfive/Kconfig > > > @@ -15,6 +15,16 @@ config PHY_STARFIVE_JH7110_DPHY_RX > > > system. If M is selected, the module will be called > > > phy-jh7110-dphy-rx.ko. > > > > > > +config PHY_STARFIVE_JH7110_DPHY_TX > > > + tristate "StarFive JH7110 D-PHY TX Support" > > > + depends on HAS_IOMEM > > > + select GENERIC_PHY > > > + select GENERIC_PHY_MIPI_DPHY > > > + help > > > + Choose this option if you have a StarFive D-PHY TX in your > > > + system. If M is selected, the module will be called > > > + phy-jh7110-dphy-tx.ko. > > > + > > > config PHY_STARFIVE_JH7110_PCIE > > > tristate "Starfive JH7110 PCIE 2.0/USB 3.0 PHY support" > > > depends on HAS_IOMEM > > > diff --git a/drivers/phy/starfive/Makefile > > > b/drivers/phy/starfive/Makefile index b391018b7c47..eedc4a6fec15 > > > 100644 > > > --- a/drivers/phy/starfive/Makefile > > > +++ b/drivers/phy/starfive/Makefile > > > @@ -1,4 +1,5 @@ > > > # SPDX-License-Identifier: GPL-2.0 > > > obj-$(CONFIG_PHY_STARFIVE_JH7110_DPHY_RX) += phy-jh7110-dphy-rx.o > > > +obj-$(CONFIG_PHY_STARFIVE_JH7110_DPHY_TX) += phy-jh7110-dphy-tx.o > > > obj-$(CONFIG_PHY_STARFIVE_JH7110_PCIE) += phy-jh7110-pcie.o > > > obj-$(CONFIG_PHY_STARFIVE_JH7110_USB) += phy-jh7110-usb.o > > > diff --git a/drivers/phy/starfive/phy-jh7110-dphy-tx.c > > > b/drivers/phy/starfive/phy-jh7110-dphy-tx.c > > > new file mode 100644 > > > index 000000000000..00be118c9606 > > > --- /dev/null > > > +++ b/drivers/phy/starfive/phy-jh7110-dphy-tx.c > > > @@ -0,0 +1,635 @@ > > > +// SPDX-License-Identifier: GPL-2.0+ > > > +/* > > > + * DPHY TX driver for the StarFive JH7110 SoC > > > + * > > > + * Copyright (C) 2023 StarFive Technology Co., Ltd. > > > + * Author: Keith Zhao > > > + * Author: Shengyang Chen */ > > > + > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > + > > > +#define STF_DPHY_APBIFSAIF_SYSCFG(x) (x) > > > + > > > +#define STF_DPHY_AON_POWER_READY_N_SHIFT 0x0U > > > +#define STF_DPHY_AON_POWER_READY_N_MASK BIT(0) > > > +#define STF_DPHY_CFG_L0_SWAP_SEL_SHIFT 0xCU > > > > lower case please, here and everywhere > > Sorry, I'm a little confused about this. > Do you mean changing '0xCU' to '0xCu'? Nope, it should be 0xcU, all the hex values should be in lower case -- ~Vinod