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Fri, 23 Feb 2024 10:27:40 -0700 Received: from che-lt-i67070.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 23 Feb 2024 10:27:36 -0700 From: Varshini Rajendran To: , , , , , , , , , , , CC: Subject: [PATCH v4 21/39] dt-bindings: clk: at91: add sam9x7 Date: Fri, 23 Feb 2024 22:57:32 +0530 Message-ID: <20240223172732.672645-1-varshini.rajendran@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240223171342.669133-1-varshini.rajendran@microchip.com> References: <20240223171342.669133-1-varshini.rajendran@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add bindings for SAM9X7's slow clock controller. Signed-off-by: Varshini Rajendran --- Changes in v4: - Added sam9x7 compatible as an enum with sama7g5 compatible as per the review comment --- .../devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml index 7be29877e6d2..ab81f0b55ad5 100644 --- a/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml +++ b/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml @@ -18,7 +18,9 @@ properties: - atmel,sama5d4-sckc - microchip,sam9x60-sckc - items: - - const: microchip,sama7g5-sckc + - enum: + - microchip,sama7g5-sckc + - microchip,sam9x7-sckc - const: microchip,sam9x60-sckc reg: -- 2.25.1