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charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: PfDTyDLDpdOU67bRvWWvIUZX/bd9AvXQKQ3W9b4/MifEd2VSmEjZC+YhD4RR1Nynml4kuYP6nlIJ94jxppbk2tuYvVo8AMbOxdatod/ttyWZWiNDbaH6pVQZkYI0zb9QbZYqu/Z8sZXtizN3gKVaH4O1Ajw6QqvCMyD6re8hTcKsuIAIAFx7PueTTpzuaHJsemZh+JV8I4G3QXp1ghTbXJlNV8fFNXBOT0lsd2NRTa3gP18zy8yrSobheQk22mtfJTPnou0VP17JaU0+kkXPGmujwXHg+HHnlbrLeON+PXAWiCK+3BWc1vQj8sb5DWr6gI7pdRxOEG8clCWuQtAecIoa3nE6exiaCp+g3CNg5+mzq3SynxoYRYd/vMmc14E1F+GKEiziz+nWx9jF4x/W2Hg8ldLxAeIYR3QWUf9enwTECkdDkDR+YBnDGCxCUq1/X6PcMng9DzPiomF4WjLxQt2q1gsyY/Yc5Y0fR20IXn9fVTlnXNYSgYKvg/wxI2+1S+WKMPJqOzMCqpsFmP9gSk/eWjqodmzLrlVUplvl9aM6ALWZQW9reRGEI1MlKBEtAW2siRWZDebjRFfViVV0FEXrVLgaXJnElhjE+Lm6371vjug8gGHFl33gc9liPrfsryhtpRCygZX6c82TT27I8UzzeUlOwSg+wroQmZvYL3E= X-OriginatorOrg: equinix.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO6PR04MB7843.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9970ec64-9f66-47f4-eda5-08dc34ba4ae8 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Feb 2024 21:56:30.4762 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72adb271-2fc7-4afe-a5ee-9de6a59f6bfb X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: w4dqW4Gmz4kLXRnJMnH8SRgqXbaBUhjEIv0gGK1DHYofmRYSibSnpVSuKjmKVy/lOSPUgsmJfLdSAnVkeqPL8Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR04MB6453 X-Proofpoint-GUID: VISMh-BNOsRdbnFJJLJFhfHuX28EcS8- X-Proofpoint-ORIG-GUID: VISMh-BNOsRdbnFJJLJFhfHuX28EcS8- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-23_06,2024-02-23_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1011 bulkscore=0 suspectscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 adultscore=0 phishscore=0 lowpriorityscore=0 impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402230157 On Thu, Feb 22, 2024 at 12:59:14AM PST, Kelly Hung wrote: >Base on aspeed-g6.dtsi and can boot into BMC console. > >Signed-off-by: Kelly Hung >--- > arch/arm/boot/dts/aspeed/Makefile | 1 + > .../boot/dts/aspeed/aspeed-bmc-asus-x4tf.dts | 592 ++++++++++++++++++ > 2 files changed, 593 insertions(+) > create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-asus-x4tf.dts > >diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/= Makefile >index d3ac20e31..32c41f3d9 100644 >--- a/arch/arm/boot/dts/aspeed/Makefile >+++ b/arch/arm/boot/dts/aspeed/Makefile >@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_ASPEED) +=3D \ > aspeed-bmc-arm-stardragon4800-rep2.dtb \ > aspeed-bmc-asrock-e3c246d4i.dtb \ > aspeed-bmc-asrock-romed8hm3.dtb \ >+ aspeed-bmc-asus-x4tf.dtb \ > aspeed-bmc-bytedance-g220a.dtb \ > aspeed-bmc-delta-ahe50dc.dtb \ > aspeed-bmc-facebook-bletchley.dtb \ >diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asus-x4tf.dts b/arch/arm/= boot/dts/aspeed/aspeed-bmc-asus-x4tf.dts >new file mode 100644 >index 000000000..1bda14a66 >--- /dev/null >+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asus-x4tf.dts >@@ -0,0 +1,592 @@ >+// SPDX-License-Identifier: GPL-2.0-or-later >+// Copyright 2024 ASUS Corp. >+ >+/dts-v1/; >+ >+#include "aspeed-g6.dtsi" >+#include "aspeed-g6-pinctrl.dtsi" >+#include >+#include >+ >+/ { >+ model =3D "ASUS-X4TF"; >+ compatible =3D "asus,x4tf", "aspeed,ast2600"; >+ >+ aliases { >+ serial4 =3D &uart5; >+ }; >+ >+ chosen { >+ stdout-path =3D "serial4:115200n8"; >+ }; >+ >+ memory@80000000 { >+ device_type =3D "memory"; >+ reg =3D <0x80000000 0x40000000>; >+ }; >+ >+ reserved-memory { >+ #address-cells =3D <1>; >+ #size-cells =3D <1>; >+ ranges; >+ >+ video_engine_memory: video { >+ size =3D <0x04000000>; >+ alignment =3D <0x01000000>; >+ compatible =3D "shared-dma-pool"; >+ reusable; >+ }; >+ }; >+ >+ iio-hwmon { >+ compatible =3D "iio-hwmon"; >+ io-channels =3D <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, >+ <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, >+ <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>, >+ <&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>; >+ }; >+ >+ leds { >+ compatible =3D "gpio-leds"; >+ >+ led-heartbeat { >+ gpios =3D <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; >+ linux,default-trigger =3D "heartbeat"; >+ }; >+ >+ led-uid { >+ gpios =3D <&gpio0 ASPEED_GPIO(P, 1) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN= )>; >+ default-state =3D "off"; >+ }; >+ >+ led-status_Y { >+ gpios =3D <&gpio1 ASPEED_GPIO(B, 1) GPIO_ACTIVE_LOW>; >+ default-state =3D "off"; >+ }; >+ >+ led-sys_boot_status { >+ gpios =3D <&gpio1 ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>; >+ default-state =3D "off"; >+ }; >+ }; >+}; >+ >+&adc0 { >+ vref =3D <2500>; >+ status =3D "okay"; >+ pinctrl-names =3D "default"; >+ pinctrl-0 =3D <&pinctrl_adc0_default &pinctrl_adc1_default >+ &pinctrl_adc2_default &pinctrl_adc3_default >+ &pinctrl_adc4_default &pinctrl_adc5_default >+ &pinctrl_adc6_default &pinctrl_adc7_default>; >+}; >+ >+&adc1 { >+ vref =3D <2500>; >+ status =3D "okay"; >+ pinctrl-names =3D "default"; >+ pinctrl-0 =3D <&pinctrl_adc8_default &pinctrl_adc9_default >+ &pinctrl_adc10_default &pinctrl_adc11_default >+ &pinctrl_adc12_default &pinctrl_adc13_default >+ &pinctrl_adc14_default &pinctrl_adc15_default>; >+}; >+ >+&peci0 { >+ status =3D "okay"; >+}; >+ >+&lpc_snoop { >+ snoop-ports =3D <0x80>; >+ status =3D "okay"; >+}; >+ >+&mac2 { >+ status =3D "okay"; >+ phy-mode =3D "rmii"; >+ use-ncsi; >+ pinctrl-names =3D "default"; >+ pinctrl-0 =3D <&pinctrl_rmii3_default>; >+}; >+ >+&mac3 { >+ status =3D "okay"; >+ phy-mode =3D "rmii"; >+ use-ncsi; >+ pinctrl-names =3D "default"; >+ pinctrl-0 =3D <&pinctrl_rmii4_default>; >+}; >+ >+&fmc { >+ status =3D "okay"; >+ >+ flash@0 { >+ status =3D "okay"; >+ m25p,fast-read; >+ label =3D "bmc-spi"; Is this specific label needed or desired for some particular reason? Most OpenBMC platforms just call it "bmc", and I think some of the firmware-update machinery may have assumptions about that baked in, so I wouldn't be surprised if this naming breaks things... >+ spi-max-frequency =3D <50000000>; >+#include "openbmc-flash-layout-128.dtsi" Just to confirm, this is actually a 128MB flash chip? I ask because the previous version of this patch had some indication of it being 64MB (though there was a lot that looked wonky with the partition layout, so maybe that was wrong too). >+ }; >+}; >+ >+&spi1 { >+ status =3D "okay"; >+ pinctrl-names =3D "default"; >+ pinctrl-0 =3D <&pinctrl_spi1_default>; >+ >+ flash@0 { >+ status =3D "okay"; >+ label =3D "bios-spi"; >+ spi-max-frequency =3D <50000000>; >+ >+ partitions { >+ compatible =3D "fixed-partitions"; >+ #address-cells =3D <1>; >+ #size-cells =3D <1>; >+ >+ biosfullimg@0 { >+ reg =3D <0x0 0x2000000>; //32768 *1024 =3D 32 MB >+ label =3D "biosfullimg"; >+ }; >+ }; If there's only one partition that's just covering the whole chip there's no need to include the 'partitions' child node. >+ }; >+}; >+ >+&i2c0 { >+ status =3D "okay"; >+}; >+ >+&i2c1 { >+ status =3D "okay"; >+}; >+ >+&i2c2 { >+ status =3D "okay"; >+}; >+ >+&i2c3 { >+ status =3D "okay"; >+}; >+ >+&i2c4 { >+ status =3D "okay"; >+ >+ temperature-sensor@48 { >+ compatible =3D "ti,tmp75"; >+ reg =3D <0x48>; >+ }; >+ >+ temperature-sensor@49 { >+ compatible =3D "ti,tmp75"; >+ reg =3D <0x49>; >+ }; >+ >+ pca9555_4_20: gpio@20 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x20>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ }; >+ >+ pca9555_4_22: gpio@22 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x22>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ }; >+ >+ pca9555_4_24: gpio@24 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x24>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ gpio-line-names =3D >+ /*A0 - A3 0*/ "", "STRAP_BMC_BATTERY_GPIO1", "", "", >+ /*A4 - A7 4*/ "", "", "", "", >+ /*B0 - B7 8*/ "", "", "", "", "", "", "", ""; >+ }; >+ >+ pca9555_4_26: gpio@26 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x26>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ }; >+ >+ i2c-mux@70 { >+ compatible =3D "nxp,pca9546"; >+ status =3D "okay"; >+ reg =3D <0x70>; >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ >+ channel_1: i2c@0 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <0>; >+ }; >+ >+ channel_2: i2c@1 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <1>; >+ }; >+ >+ channel_3: i2c@2 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <2>; >+ }; >+ >+ channel_4: i2c@3 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <3>; >+ }; >+ }; >+}; >+ >+&i2c5 { >+ status =3D "okay"; >+ >+ pca9555_5_24: gpio@24 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x24>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ }; >+ >+ i2c-mux@70 { >+ compatible =3D "nxp,pca9546"; >+ status =3D "okay"; >+ reg =3D <0x70 >; >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ >+ channel_5: i2c@0 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <0>; >+ >+ pca9555_5_5_20: gpio@20 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x20>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ gpio-line-names =3D >+ "", "", "", "", "", "", "", "", >+ "", "", "SYS_FAN6", "SYS_FAN5", >+ "SYS_FAN4", "SYS_FAN3", >+ "SYS_FAN2", "SYS_FAN1"; >+ }; >+ >+ pca9555_5_5_21: gpio@21 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x21>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ }; >+ >+ power-monitor@44 { >+ compatible =3D "ti,ina219"; >+ reg =3D <0x44>; >+ shunt-resistor =3D <2>; >+ }; >+ }; >+ >+ channel_6: i2c@1 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <1>; >+ }; >+ >+ channel_7: i2c@2 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <2>; >+ }; >+ >+ channel_8: i2c@3 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <3>; >+ }; >+ }; >+}; >+ >+&i2c6 { >+ status =3D "okay"; >+ >+ pca9555_6_27: gpio@27 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x27>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ }; >+ >+ pca9555_6_20: gpio@20 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x20>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ gpio-line-names =3D >+ /*A0 0*/ "", "", "", "", "", "", "", "", >+ /*B0 8*/ "Drive_NVMe1", "Drive_NVMe2", "", "", >+ /*B4 12*/ "", "", "", ""; >+ }; >+ >+ pca9555_6_21: gpio@21 { >+ compatible =3D "nxp,pca9555"; >+ reg =3D <0x21>; >+ gpio-controller; >+ #gpio-cells =3D <2>; >+ }; >+}; >+ >+&i2c7 { >+ status =3D "okay"; >+ >+ i2c-mux@70 { >+ compatible =3D "nxp,pca9546"; >+ status =3D "okay"; >+ reg =3D <0x70>; >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ idle-state =3D <1>; >+ >+ channel_9: i2c@0 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <0>; >+ >+ temperature-sensor@48 { >+ compatible =3D "ti,tmp75"; >+ reg =3D <0x48>; >+ }; >+ >+ temperature-sensor@49 { >+ compatible =3D "ti,tmp75"; >+ reg =3D <0x49>; >+ }; >+ >+ power-monitor@40 { >+ compatible =3D "ti,ina219"; >+ reg =3D <0x40>; >+ shunt-resistor =3D <2>; >+ }; >+ >+ power-monitor@41 { >+ compatible =3D "ti,ina219"; >+ reg =3D <0x41>; >+ shunt-resistor =3D <5>; >+ }; >+ }; >+ >+ channel_10: i2c@1 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <1>; >+ }; >+ >+ channel_11: i2c@2 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <2>; >+ }; >+ >+ channel_12: i2c@3 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <3>; >+ }; >+ }; >+ >+ i2c-mux@71 { >+ compatible =3D "nxp,pca9546"; >+ status =3D "okay"; >+ reg =3D <0x71>; >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ i2c-mux-idle-disconnect; >+ >+ channel_13: i2c@0 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <0>; >+ }; >+ >+ channel_14: i2c@1 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <1>; >+ }; >+ >+ channel_15: i2c@2 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <2>; >+ }; >+ >+ channel_16: i2c@3 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <3>; >+ }; >+ }; >+}; >+ >+&i2c8 { >+ status =3D "okay"; >+ >+ i2c-mux@70 { >+ compatible =3D "nxp,pca9546"; >+ status =3D "okay"; >+ reg =3D <0x70>; >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ i2c-mux-idle-disconnect; >+ >+ channel_17: i2c@0 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <0>; >+ }; >+ >+ channel_18: i2c@1 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <1>; >+ >+ temperature-sensor@48 { >+ compatible =3D "ti,tmp75"; >+ reg =3D <0x48>; >+ }; >+ >+ power-monitor@41 { >+ compatible =3D "ti,ina219"; >+ reg =3D <0x41>; >+ shunt-resistor =3D <5>; >+ }; >+ }; >+ >+ channel_19: i2c@2 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <2>; >+ }; >+ >+ channel_20: i2c@3 { >+ #address-cells =3D <1>; >+ #size-cells =3D <0>; >+ reg =3D <3>; >+ }; >+ }; >+}; >+ >+&i2c9 { >+ status =3D "okay"; >+}; >+ >+&i2c10 { >+ status =3D "okay"; >+}; >+ >+&i2c11 { >+ status =3D "okay"; >+}; >+ >+&i2c14 { >+ status =3D "okay"; >+ multi-master; >+ >+ eeprom@50 { >+ compatible =3D "atmel,24c08"; >+ reg =3D <0x50>; >+ }; >+ >+ eeprom@51 { >+ compatible =3D "atmel,24c08"; >+ reg =3D <0x51>; >+ }; >+}; >+ >+&sgpiom0 { >+ status =3D "okay"; >+ ngpios =3D <128>; >+}; >+ >+&video { >+ status =3D "okay"; >+ memory-region =3D <&video_engine_memory>; >+}; >+ >+&sdc { >+ status =3D "okay"; >+}; >+ >+&lpc_snoop { >+ status =3D "okay"; >+ snoop-ports =3D <0x80>; >+}; >+ >+&kcs1 { >+ aspeed,lpc-io-reg =3D <0xca0>; >+ status =3D "okay"; >+}; >+ >+&kcs2 { >+ aspeed,lpc-io-reg =3D <0xca8>; >+ status =3D "okay"; >+}; >+ >+&kcs3 { >+ aspeed,lpc-io-reg =3D <0xca2>; >+ status =3D "okay"; >+}; >+ >+&uart3 { >+ status =3D "okay"; >+}; >+ >+&uart5 { >+ status =3D "okay"; >+}; >+ >+&uart_routing { >+ status =3D "okay"; >+}; >+ >+&vhub { >+ status =3D "okay"; >+}; >+ >+&gpio0 { >+ gpio-line-names =3D >+ /*A0 0*/ "", "", "", "", "", "", "", "", >+ /*B0 8*/ "", "", "", "", "", "", "PS_PWROK", "", >+ /*C0 16*/ "", "", "", "", "", "", "", "", >+ /*D0 24*/ "", "", "", "", "", "", "", "", >+ /*E0 32*/ "", "", "", "", "", "", "", "", >+ /*F0 40*/ "", "", "", "", "", "", "", "", >+ /*G0 48*/ "", "", "", "", "", "", "", "", >+ /*H0 56*/ "", "", "", "", "", "", "", "", >+ /*I0 64*/ "", "", "", "", "", "", "", "", >+ /*J0 72*/ "", "", "", "", "", "", "", "", >+ /*K0 80*/ "", "", "", "", "", "", "", "", >+ /*L0 88*/ "", "", "", "", "", "", "", "", >+ /*M0 96*/ "", "", "", "", "", "", "", "", >+ /*N0 104*/ "", "", "", "", >+ /*N4 108*/ "POST_COMPLETE", "ESR1_GPIO_AST_SPISEL", "", "", >+ /*O0 112*/ "", "", "", "", "", "", "", "", >+ /*P0 120*/ "ID_BUTTON", "ID_OUT", "POWER_BUTTON", "POWER_OUT", >+ /*P4 124*/ "RESET_BUTTON", "RESET_OUT", "", "HEARTBEAT", >+ /*Q0 128*/ "", "", "", "", "", "", "", "", >+ /*R0 136*/ "", "", "", "", "", "", "", "", >+ /*S0 144*/ "", "", "", "", "", "", "", "", >+ /*T0 152*/ "", "", "", "", "", "", "", "", >+ /*U0 160*/ "", "", "", "", "", "", "", "", >+ /*V0 168*/ "", "", "", "", "", "", "", "", >+ /*W0 176*/ "", "", "", "", "", "", "", "", >+ /*X0 184*/ "", "", "", "", "", "", "", "", >+ /*Y0 192*/ "", "", "", "", "", "", "", "", >+ /*Z0 200*/ "", "", "", "", "", "", "", ""; >+}; >--=20 >2.25.1 >=