Received: by 2002:a05:7208:9594:b0:7e:5202:c8b4 with SMTP id gs20csp546732rbb; Sat, 24 Feb 2024 11:57:57 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCXHuoU3gFZo0/zixoI9Ksc8tGIahcUoOKYljppaqtiXGm+zjpKFaL7Q30/n4KmlzFcAvGiwjkEcRdswPwVaqy8CKBRP2WxcxYHOLOpHkA== X-Google-Smtp-Source: AGHT+IHsfiHXnZdnsxSAAql8oGPzWwg/p3Npc5wlQRb89RE80yU+pmV2OS75VDqUNNNYBJwAl+7q X-Received: by 2002:aa7:8b8b:0:b0:6e4:61af:4c7b with SMTP id r11-20020aa78b8b000000b006e461af4c7bmr3078493pfd.30.1708804676991; Sat, 24 Feb 2024 11:57:56 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1708804676; cv=pass; d=google.com; s=arc-20160816; b=NzsIJoP3QCsFmu+pqq+WBbeNiUFVaq7Np9pKNrTB01AvVCHgADp3Se8o9xhcP2rq/V ok8bvqp3FqvQRcYoshw9l1oPEm3TAUY+j9tIgEDoT7dZjJNNJ1d80J57BiwwfBS+z0If onGPq/XnF7UvqRchqi715dJ/iAnrlEe9mofRdzCqEOhg2z/z+sr/izGrptjDYfM75FE0 cpHJU4G0V3UikTa9uZ6AwvsR4WRusJKAJcjAiCu5ONu5M3MEVXBdxHcsFOQOQiy5TtZX LliWHQoB12qn3/4PDG4W+kjWun23UF+JjgxBVPPLB8L48KsygCtvQn7Gpg7YI9NZkbLd MbRA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:list-unsubscribe:list-subscribe :list-id:precedence:dkim-signature; bh=3upkBSE7EW4IvTVy+GKTlfggEfeNrb15KBzrmzdqVsY=; fh=TlW7wcXcP6X6sxfNdxioNWfzLBLaQ61mIZVy6g6ZVtU=; b=PFU82f5WOB6HIWRjbfx9vo2zTn6ReKyYOdbN7G6bdGXEwd1TpZXr7v5gpl2+liAKXt 88LvWBv1O+e8dbyl/X79N+zV7XsPyo1o0v5hIYTnR6UAfQefPD0YjXY8Ai+yCnW4GS1C KetF5/dkOimK/YLaf1GK3CPGhIjnpVm4tNMgVTEIogYlwuPcCV3Lkw4tiRnM/fYg068I df+EphK9Y4BMlyD/44qheMcmkzYRwnOzOs0p1Lx14gUB9BEs7YahsFW/SuRNMdkHi3jL wyVzIX4iSOAt+MD5YiHi4Lhnvs/OpnrhHrcAa0bGBNXL0WugabyXhh/mQUsidJYVbhy6 BOzQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NAd4oJC2; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-79817-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79817-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id i5-20020a63e905000000b005cdfaea88adsi1236674pgh.774.2024.02.24.11.57.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Feb 2024 11:57:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-79817-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NAd4oJC2; arc=pass (i=1 spf=pass spfdomain=linaro.org dkim=pass dkdomain=linaro.org dmarc=pass fromdomain=linaro.org); spf=pass (google.com: domain of linux-kernel+bounces-79817-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-79817-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 1C37328295F for ; Sat, 24 Feb 2024 19:57:56 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 365E84C635; Sat, 24 Feb 2024 19:57:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="NAd4oJC2" Received: from mail-yb1-f182.google.com (mail-yb1-f182.google.com [209.85.219.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80D874C63D for ; Sat, 24 Feb 2024 19:57:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.182 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708804669; cv=none; b=aCN5TV8v9jguuQzeHCEIhcdS5H7GPW6PmqwoZy8pmKWgE+OaBPCTtKY2gaBhn37/5C9t5BR9RxDMy8Be6zTKYNxi6oJYoENDRvd3RKbut5yH2RjdwQOvvc3ZifAz8P/pFMY5PGTMN+/JAqce7HA1CptbJTFHAigFZ+aJ6dfjNlA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708804669; c=relaxed/simple; bh=QT98gB0MamXu+48RZNGJKHHUP35XArdtMZSyttKyeqM=; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject: To:Cc:Content-Type; b=RBKjNS2QvWBA0yo2JL9lQuetZT9V6BjTUQcEExwZWFOPRuqbWqoi+PoOUGmcXnnZM+OTSqmNHAtVj2jlVCpM6uM++87mk+fGcL1dOg4a223FhBF+TZhH+rVndTS17bZaRq9oQKQJW/DJbHLdFAE3uZrv/r3JOCkvJ6i8o9vibG8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=NAd4oJC2; arc=none smtp.client-ip=209.85.219.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Received: by mail-yb1-f182.google.com with SMTP id 3f1490d57ef6-dcbc00f6c04so1920650276.3 for ; Sat, 24 Feb 2024 11:57:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708804666; x=1709409466; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=3upkBSE7EW4IvTVy+GKTlfggEfeNrb15KBzrmzdqVsY=; b=NAd4oJC2v0oLjR3kGoQO+AQEzFPHslNy3YRTisExxy+Usvy2yJdcVgOuoDax/aNm9N p+iC1ALNpX9ejayOImmiGDpAnwavMnaU+IvwWWfI1Tw3imIcWtTCxRRBzOFRZgd1pgr4 FiG/1jNbqRLyqr11b8yTvs9VAQ1XzzZ16shc3cpA8hN9gcEMjdKJ/+taPko8QMXXbo4T Xx72TUHuxwGtL58WOqAGIp5EscHc0r63w+2lG3q+tyvlKyPP0NvwxHBZQdLKet3salEF 5WgukKqjJTGgUluNq9TF1mTPssqzBLOM+W77RGvvKWbK0FBACpLFDwknQlPO3cwtcaMv stOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708804666; x=1709409466; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3upkBSE7EW4IvTVy+GKTlfggEfeNrb15KBzrmzdqVsY=; b=W08pm0Qm7wYZ8fn9QzwepY/I0osBclRhXh/E7hLq0BTg6M9L/KNLAteKJgaEAHgkdm zjkf020IhkjM+qVLWipGRVRsb6obJzdaR977U7mRf3MusfssbsOQhC4govsrYabYSgBc /F+gm+OjdMBMHcWOns2L4QKdxjetLBU069DgEwveVRtBnflRQk/mDk6F2L31rrV3+i3Y SrV/MPFuv36zLkqOX2EtCAHJ4pNPcNg60XUJ1GhzRguRtSiutEE4YcaephXYEtKZzNJq aCC6KnVxc89JL+PjwW0SmeThgYPsIXQ5vxltPB4zdnwns86M3c1+9z+5XryNKQGOP31H IpAA== X-Forwarded-Encrypted: i=1; AJvYcCX+48nU3bqUz/4wI0RLsjJTpTxxNnxe8Z6w5L/+MWvseWlCfZiLKUQ6N8wSJoBkrsl0ev7HAr726MBI7y7M8uYfAD1PbiKH8HCpJKBK X-Gm-Message-State: AOJu0YxHl0Gthb1ml8BfDHpcHYW2OnWNlic+6x4J3GctnX8aJEyeinAK j1wZHBbcswoRVu8bQkx6wHkl5gzPyK1pK10gNVXIaJUSsiDwl5031ZKRb0UV9KEsF4Qw1pFvFp+ hu9X3c11QVqnVHflJ3KCsLl0JMWBx9oPPE7mhrw== X-Received: by 2002:a25:abcf:0:b0:dc6:9ea9:8154 with SMTP id v73-20020a25abcf000000b00dc69ea98154mr2050724ybi.13.1708804666266; Sat, 24 Feb 2024 11:57:46 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240216223245.12273-1-semen.protsenko@linaro.org> <20240216223245.12273-12-semen.protsenko@linaro.org> In-Reply-To: From: Sam Protsenko Date: Sat, 24 Feb 2024 13:57:35 -0600 Message-ID: Subject: Re: [PATCH 11/16] clk: samsung: Keep register offsets in chip specific structure To: Krzysztof Kozlowski Cc: Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Tomasz Figa , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Feb 22, 2024 at 1:47=E2=80=AFAM Krzysztof Kozlowski wrote: > > On 22/02/2024 01:42, Sam Protsenko wrote: > > On Tue, Feb 20, 2024 at 5:04=E2=80=AFAM Krzysztof Kozlowski > > wrote: > >> > >> On 16/02/2024 23:32, Sam Protsenko wrote: > >>> Abstract CPU clock registers by keeping their offsets in a dedicated > >>> chip specific structure to accommodate for oncoming Exynos850 support= , > >>> which has different offsets for cluster 0 and cluster 1. This rework > >>> also makes it possible to use exynos_set_safe_div() for all chips, so > >>> exynos5433_set_safe_div() is removed here to reduce the code > >>> duplication. > >>> > >> > >> So that's the answer why you could not use flags anymore - you need an > >> enum, not a bitmap. Such short explanation should be in previous commi= ts > >> justifying moving reg layout to new property. > > > > Will do, thanks. > > > >> > >>> No functional change. > >>> > >>> Signed-off-by: Sam Protsenko > >>> --- > >>> drivers/clk/samsung/clk-cpu.c | 156 +++++++++++++++++++-------------= -- > >>> 1 file changed, 86 insertions(+), 70 deletions(-) > >>> > >>> diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-= cpu.c > >>> index 04394d2166c9..744b609c222d 100644 > >>> --- a/drivers/clk/samsung/clk-cpu.c > >>> +++ b/drivers/clk/samsung/clk-cpu.c > >>> @@ -44,12 +44,14 @@ typedef int (*exynos_rate_change_fn_t)(struct clk= _notifier_data *ndata, > >>> > >>> /** > >>> * struct exynos_cpuclk_chip - Chip specific data for CPU clock > >>> + * @regs: register offsets for CPU related clocks > >>> * @pre_rate_cb: callback to run before CPU clock rate change > >>> * @post_rate_cb: callback to run after CPU clock rate change > >>> */ > >>> struct exynos_cpuclk_chip { > >>> - exynos_rate_change_fn_t pre_rate_cb; > >>> - exynos_rate_change_fn_t post_rate_cb; > >>> + const void * const regs; > >> > >> Why this is void? > >> > > > > Different chips can have very different register layout. For example, > > older Exynos chips usually keep multiple CPU divider ratios in one > > single register, whereas more modern chips have a dedicated register > > for each divider clock. Also, old chips usually split divider ratio vs > > DIV clock status between different registers, but in modern chips they > > both live in one single register. Having (void *) makes it possible to > > keep pointers to different structures, and each function for the > > particular chip can "know" which exactly structure is stored there, > > casting (void *) to a needed type. Another way to do that would be to > > have "one-size-fits-all" structure with all possible registers for all > > possible chips. I don't know, I just didn't like that for a couple of > > reasons, so decided to go with (void *). > > > > I'll add some explanation in the commit message in v2. > > Currently the one-size-fits-all seems feasible, even if few fields are > not matching, so I would prefer to go this approach. > Sure, no problem. Will fix it in v3. > Best regards, > Krzysztof >