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AJvYcCWzcPHZ4WAklC9Zjb7IAqpXQto9hIpqrRNU9eOkEiJkbj+3R8hFHDjtCw1ad+Jhyb6LgTjA3O5cZZVjjYXzHjoeD1yr7VTKFH5LSxRz X-Gm-Message-State: AOJu0YyySVEkqGBaBnucUnv9c8XvCXSC0mxmFEhBPRbV1CWhw7ANkqgz KyFdaeYljafuSHGrGYab/3Ao0vtbfB+DTtdnzmthvvhH6hyWdXWNjOP8cPgLmj72gLZ4GIvXH4u lzqB0jBwfmG0FyaADSTJg44LCC1dTfloVfPgbZg== X-Received: by 2002:a05:6808:2085:b0:3c1:51c1:f4ee with SMTP id s5-20020a056808208500b003c151c1f4eemr7018711oiw.48.1708894813963; Sun, 25 Feb 2024 13:00:13 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240225-gcc-ipq5018-register-fixes-v1-0-3c191404d9f0@gmail.com> <20240225-gcc-ipq5018-register-fixes-v1-1-3c191404d9f0@gmail.com> In-Reply-To: <20240225-gcc-ipq5018-register-fixes-v1-1-3c191404d9f0@gmail.com> From: Dmitry Baryshkov Date: Sun, 25 Feb 2024 23:00:02 +0200 Message-ID: Subject: Re: [PATCH 1/3] clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk' To: Gabor Juhos Cc: Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Gokul Sriram Palanisamy , Varadarajan Narayanan , Sricharan Ramabadhran , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" On Sun, 25 Feb 2024 at 19:33, Gabor Juhos wrote: > > The value of the 'enable_reg' field in the 'gcc_gmac0_sys_clk' > clock definition seems wrong as it is greater than the > 'max_register' value defined in the regmap configuration. > Additionally, all other gmac specific branch clock definitions > within the driver uses the same value both for the 'enable_reg' > and for the 'halt_reg' fields. > > Due to the lack of documentation the correct value is not known. > Looking into the downstream driver does not help either, as that > uses the same (presumably wrong) value [1]. > > Nevertheless, change the 'enable_reg' field of 'gcc_gmac0_sys_clk' > to use the value from the 'halt_reg' field so it follows the pattern > used in other gmac clock definitions. The change is based on the > assumption that the register layout of this clock is the same > as the other gmac clocks. > > 1. https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/blob/NHSS.QSDK.12.4.r4/drivers/clk/qcom/gcc-ipq5018.c?ref_type=heads#L1889 > > Fixes: e3fdbef1bab8 ("clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018") > Signed-off-by: Gabor Juhos > --- > drivers/clk/qcom/gcc-ipq5018.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Dmitry Baryshkov -- With best wishes Dmitry