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Sun, 25 Feb 2024 21:03:43 GMT Received: from [10.110.76.211] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Sun, 25 Feb 2024 13:03:42 -0800 Message-ID: <293d04ae-f6ca-3362-5924-cdd789888360@quicinc.com> Date: Sun, 25 Feb 2024 13:03:40 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v3 1/3] drm/msm/dpu: make "vblank timeout" more useful Content-Language: en-US To: Dmitry Baryshkov CC: Rob Clark , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Steev Klimaszewski , , , , References: <20240225-fd-dpu-debug-timeout-v3-0-252f2b21cdcc@linaro.org> <20240225-fd-dpu-debug-timeout-v3-1-252f2b21cdcc@linaro.org> <4e6b41f4-27a6-4c65-dc03-67437a9716ed@quicinc.com> From: Abhinav Kumar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: zKTH_YHEalCvYn2B29eO31mCHYiW4Cne X-Proofpoint-GUID: zKTH_YHEalCvYn2B29eO31mCHYiW4Cne X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-25_25,2024-02-23_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 priorityscore=1501 mlxlogscore=792 spamscore=0 bulkscore=0 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2402250168 On 2/25/2024 12:57 PM, Dmitry Baryshkov wrote: > On Sun, 25 Feb 2024 at 21:44, Abhinav Kumar wrote: >> >> >> >> On 2/25/2024 6:12 AM, Dmitry Baryshkov wrote: >>> We have several reports of vblank timeout messages. However after some >>> debugging it was found that there might be different causes to that. >>> To allow us to identify the DPU block that gets stuck, include the >>> actual CTL_FLUSH value into the timeout message. >>> >> >> the flush register shall also be part of the coredump in patch 3. so why >> is this needed? > > I'd prefer to keep it. The devcoredump captures all registers, while > CTL_FLUSH points to the actual bit without the need to analyze the > coredump. At the very least, it allows us to analyze whether the issue > is the same or not (compare SSPP_DMA2 on c630 vs LM_1 on sdm660) > without looking into the dump. > Ok, sg Reviewed-by: Abhinav Kumar >> >>> Signed-off-by: Dmitry Baryshkov >>> --- >>> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c >>> index 2aa72b578764..6058706f03e4 100644 >>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c >>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c >>> @@ -480,7 +480,7 @@ static int dpu_encoder_phys_vid_wait_for_commit_done( >>> (hw_ctl->ops.get_flush_register(hw_ctl) == 0), >>> msecs_to_jiffies(50)); >>> if (ret <= 0) { >>> - DPU_ERROR("vblank timeout\n"); >>> + DPU_ERROR("vblank timeout: %x\n", hw_ctl->ops.get_flush_register(hw_ctl)); >>> return -ETIMEDOUT; >>> } >>> >>> > > >