Received-SPF: pass (google.com: domain of linux-kernel+bounces-80479-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1;
Date: Sun, 25 Feb 2024 21:47:41 -0600
From: Lucas De Marchi <lucas.demarchi@intel.com>
To: Arnd Bergmann <arnd@kernel.org>
CC: Oded Gabbay <ogabbay@kernel.org>, Thomas =?utf-8?Q?Hellstr=C3=B6m?=
	<thomas.hellstrom@linux.intel.com>, Arnd Bergmann <arnd@arndb.de>, "Maarten
 Lankhorst" <maarten.lankhorst@linux.intel.com>, Maxime Ripard
	<mripard@kernel.org>, Thomas Zimmermann <tzimmermann@suse.de>, David Airlie
	<airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Rodrigo Vivi
	<rodrigo.vivi@intel.com>, Matt Roper <matthew.d.roper@intel.com>, "Matthew
 Brost" <matthew.brost@intel.com>, Himal Prasad Ghimiray
	<himal.prasad.ghimiray@intel.com>, Francois Dugast
	<francois.dugast@intel.com>, Dave Airlie <airlied@redhat.com>,
	<intel-xe@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] drm/xe/xe2: fix 64-bit division in pte_update_size
Message-ID: <nuwtejmu4nvxxvkobawafbmogpx6qjk3dnbnj7kobfb7gvpyw7@pxg3bv42qkop>
References: <20240224121528.1972719-1-arnd@kernel.org>
 <20240224121528.1972719-3-arnd@kernel.org>
Content-Type: text/plain; charset="us-ascii"; format=flowed
Content-Disposition: inline
In-Reply-To: <20240224121528.1972719-3-arnd@kernel.org>
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?ShSIiGvZtNEYvBQMlL353jTGwcXUeLvoDO6cjMBmapiYhhrr9q64UFAcd1Pu?=
 =?us-ascii?Q?c2GnoiKT0pX3JR9Bg7pr3dFeKFknLnKHAHdgNL0ESV5GXnT7173ylfP7hXgT?=
 =?us-ascii?Q?3jWzMKAeiYLaCVlwr9ayGaxzvj1sjoehrHep+fh09TaoeQBNbZoGk2EKVdNR?=
 =?us-ascii?Q?sug94q5BGCmt59Zbv7oSOIt4TK2sZiDyNurkn6CveLZs+3QBpFWYG+u6Q3h+?=
 =?us-ascii?Q?8g3taL+sDcBRrJmnhX6YhTiHxK9RrRSlY8HxbL0ju0It4NqlrheeMOBe81Kf?=
 =?us-ascii?Q?TMgNqOHaRbFQCzE1q4VMwwzPB3dIKrWpdJZwm4TQCa4sL3+XfrLegCUA/3a/?=
 =?us-ascii?Q?rVFNwx/etluOxPJWVmPAUGREWkEoJI6bxBhwuWRkjIV1oH7VVzgUOO+E4JdI?=
 =?us-ascii?Q?SMFcaFWT3old5SDh6rH5jy2a0zLytXFadZr5IpII6AYMeUGjh3eiGJD821L1?=
 =?us-ascii?Q?HiZaGx/Ytp2fonEauWvnnxwmoXRIlwyK4kzcRzma/T7RjnEEcvB1nue5kAjt?=
 =?us-ascii?Q?NB0hB8mqjVLy8DuPaxqZ2GgAEOd/na5Z4DF/bXsc1LvzhW1kWhCXZ2QqwiDP?=
 =?us-ascii?Q?26XHYu3gJ208rUy8hQk0b2a1CyzmLeyqCWeDvBvq/fGlb4Elc10Wbrn4dbMT?=
 =?us-ascii?Q?Kx4wKyiGm4iGDVRvPw/V3t8AtyqZXIjqqqJsDBcBPcKDC97rOmwMxrTJxZsv?=
 =?us-ascii?Q?OUJMDuv3qRsD6wJzVBQVjwUjQgYz0a4Yr5w/e9+fEIrk3sK7dzrcHTBzcI7D?=
 =?us-ascii?Q?Fz7g96CI6pe8JmUeXGxdaxeWItmqNlXrfruwIiAWa7pCUH4KB6iQawSFGfcc?=
 =?us-ascii?Q?4XdiMZlYyhA6DQtxsruoeaOnelVqBDtGafJILBcT3F+vD6jGKiO0coIk4K8Z?=
 =?us-ascii?Q?/Xq/nLm6bkhUpD4/xmKqfkI7g2/ANYMavPiHovgou2lPEsc09CZgu6yt0+CJ?=
 =?us-ascii?Q?ujkpVw2MEpygs96ZpBN7m9Xfa7T7refOEIoRiCVygJpJiMFlH7z+RuRE5Up3?=
 =?us-ascii?Q?AMyrELJP/c2v0dQLf8tUHfIxhQGiFYYSnpngD9st02KxmK79vHJOlv9ILpsb?=
 =?us-ascii?Q?kk5Rnt/qFqylSiYKO18bcl5B7gcw3Z37RnwjD26Z/et/e3CBvkoFsRkJq4Lv?=
 =?us-ascii?Q?Xtwp5GsTym8ifFRQJBM96i+Jst+sjX2cnzatuzewEAXYfbt2KnvMzwieKLMN?=
 =?us-ascii?Q?ls4lqJ/QCBwF6kb8kDEeTl7u93DOOC6ULdqS9d0ZWKN7qIYbRbyag4FnY39e?=
 =?us-ascii?Q?MIqkN3VQyfcUN5e/vAPWFNEc4blx4YerNlVuPdNwg+zV7JP+zH4NnVoy2AfU?=
 =?us-ascii?Q?WWX8VPtBBijKW7gzHtTzglMFqspRjPALwwhrEsddIFkGwuEwCovD60HhpqgH?=
 =?us-ascii?Q?ZwAsWmYq3FkrVAikRAkyk4T8IWO+Q6LWpwHbTH/aGWhy4Y3q++X4xlouN6yu?=
 =?us-ascii?Q?TanFJx0/ihSA243WgeeieBPx3Q7zGf/+vn7zGxFOcXV6c1e3s6EVdjen+pjq?=
 =?us-ascii?Q?qPIucCZ3952RStIazIDD7973uFbBiJI07XMJxRHfjr8lQLJkgcsMhXaM1J3a?=
 =?us-ascii?Q?fGOoHGG11Wi/llPrrsgTsMvNerLTHbVdlR5kMZL6D8qugU1MTuCMdcEp8Zn9?=
 =?us-ascii?Q?mA=3D=3D?=
X-MS-Exchange-CrossTenant-Network-Message-Id: 0918f65e-447e-4dca-f7f7-08dc367db0a9
X-MS-Exchange-CrossTenant-AuthSource: CY5PR11MB6139.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2024 03:47:44.3881
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 2cvj3nsZhUsVI6RT24GW5gG6wDFATcqOknVigrSCx0A9Ne1/uL+ApKAkG1Q4eQ3JK7uawQOOOI0ZN8Ovc4iO0BO4X/E7tZBaSmKBd3K2rbE=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB6168
X-OriginatorOrg: intel.com

On Sat, Feb 24, 2024 at 01:15:01PM +0100, Arnd Bergmann wrote:
>From: Arnd Bergmann <arnd@arndb.de>
>
>This function does not build on 32-bit targets when the compiler
>fails to reduce DIV_ROUND_UP() into a shift:
>
>ld.lld: error: undefined symbol: __aeabi_uldivmod
>>>> referenced by xe_migrate.c
>>>>               drivers/gpu/drm/xe/xe_migrate.o:(pte_update_size) in archive vmlinux.a
>
>There are two instances in this function. Change the first to
>use an open-coded shift with the same behavior, and the second
>one to a 32-bit calculation, which is sufficient here as the size
>is never more than 2^32 pages (16TB).
>
>Fixes: ea97a66a2218 ("drm/xe: Disable 32bits build")

same comment as in patch 2... should rather be the commit *enabling* 32b
builds?

Should this be something to be dealt with at the DIV_ROUND_UP() layer?
Why did the compiler fail to reduce it here but didn't in the other
11 uses in the xe driver?

thanks
Lucas De Marchi

>Signed-off-by: Arnd Bergmann <arnd@arndb.de>
>---
> drivers/gpu/drm/xe/xe_migrate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
>index a66fdf2d2991..ee1bb938c493 100644
>--- a/drivers/gpu/drm/xe/xe_migrate.c
>+++ b/drivers/gpu/drm/xe/xe_migrate.c
>@@ -462,7 +462,7 @@ static u32 pte_update_size(struct xe_migrate *m,
> 	} else {
> 		/* Clip L0 to available size */
> 		u64 size = min(*L0, (u64)avail_pts * SZ_2M);
>-		u64 num_4k_pages = DIV_ROUND_UP(size, XE_PAGE_SIZE);
>+		u32 num_4k_pages = (size + XE_PAGE_SIZE - 1) >> XE_PTE_SHIFT;
>
> 		*L0 = size;
> 		*L0_ofs = xe_migrate_vm_addr(pt_ofs, 0);
>-- 
>2.39.2
>