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charset=us-ascii Content-Disposition: inline In-Reply-To: <1708683351-8504-1-git-send-email-shengjiu.wang@nxp.com> On 24-02-23 18:15:51, Shengjiu Wang wrote: > There is SAI1, SAI2, SAI3, SAI5, SAI6, SAI7 existing in this block > control, the order is discontinuous. The definition of SAI_MCLK_SEL(n) > is not match with the usage of CLK_SAIn(n). > > So define SAI##n##_MCLK_SEL separately to fix the issue. > > Fixes: 6cd95f7b151c ("clk: imx: imx8mp: Add audiomix block control") > Signed-off-by: Shengjiu Wang Reviewed-by: Abel Vesa > --- > drivers/clk/imx/clk-imx8mp-audiomix.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c > index e4300df88f1a..55ed211a5e0b 100644 > --- a/drivers/clk/imx/clk-imx8mp-audiomix.c > +++ b/drivers/clk/imx/clk-imx8mp-audiomix.c > @@ -18,7 +18,12 @@ > > #define CLKEN0 0x000 > #define CLKEN1 0x004 > -#define SAI_MCLK_SEL(n) (0x300 + 4 * (n)) /* n in 0..5 */ > +#define SAI1_MCLK_SEL 0x300 > +#define SAI2_MCLK_SEL 0x304 > +#define SAI3_MCLK_SEL 0x308 > +#define SAI5_MCLK_SEL 0x30C > +#define SAI6_MCLK_SEL 0x310 > +#define SAI7_MCLK_SEL 0x314 > #define PDM_SEL 0x318 > #define SAI_PLL_GNRL_CTL 0x400 > > @@ -95,13 +100,13 @@ static const struct clk_parent_data clk_imx8mp_audiomix_pll_bypass_sels[] = { > IMX8MP_CLK_AUDIOMIX_SAI##n##_MCLK1_SEL, {}, \ > clk_imx8mp_audiomix_sai##n##_mclk1_parents, \ > ARRAY_SIZE(clk_imx8mp_audiomix_sai##n##_mclk1_parents), \ > - SAI_MCLK_SEL(n), 1, 0 \ > + SAI##n##_MCLK_SEL, 1, 0 \ > }, { \ > "sai"__stringify(n)"_mclk2_sel", \ > IMX8MP_CLK_AUDIOMIX_SAI##n##_MCLK2_SEL, {}, \ > clk_imx8mp_audiomix_sai_mclk2_parents, \ > ARRAY_SIZE(clk_imx8mp_audiomix_sai_mclk2_parents), \ > - SAI_MCLK_SEL(n), 4, 1 \ > + SAI##n##_MCLK_SEL, 4, 1 \ > }, { \ > "sai"__stringify(n)"_ipg_cg", \ > IMX8MP_CLK_AUDIOMIX_SAI##n##_IPG, \ > -- > 2.34.1 >