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From: Christophe Kerello <christophe.kerello@foss.st.com>
To: <krzysztof.kozlowski@linaro.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>
CC: <linux-kernel@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>,
        <devicetree@vger.kernel.org>,
        Christophe Kerello <christophe.kerello@foss.st.com>
Subject: [PATCH v3 0/5] memory: stm32-fmc2-ebi: Add MP25 FMC2 support
Date: Mon, 26 Feb 2024 11:14:23 +0100
Message-ID: <20240226101428.37791-1-christophe.kerello@foss.st.com>
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On MP1 SoC, RNB signal (NAND controller signal) and NWAIT signal (PSRAM
controller signal) have been integrated together in the SoC. That means
that the NAND controller and the PSRAM controller (if the signal is
used) can not be used at the same time. On MP25 SoC, the 2 signals can
be used outside the SoC, so there is no more restrictions.
    
MP1 SoC also embeds revision 1.1 of the FMC2 IP when MP25 SoC embeds
revision 2.0 of the FMC2 IP.

Changes in v3:
 - Simplify stm32_fmc2_ebi_save_setup function in patch 2.
 - Do not check non null ops in patch 3.

Changes in v2:
 - V1 patch 1 and 2 have been squashed and commit message has been updated.
 - V1 patch 3, 4 and 5 have been squashed and reworked.
 - V1 patch 7 has been renamed and associated commit message has been updated.
 - V1 patchset is split, one for memory, and another one for NAND. 
 - Regmap_read API return value is checked everywhere it is called.
 - A platform data structure is handling the difference between MP1 and MP25.

Christophe Kerello (5):
  dt-bindings: memory-controller: st,stm32: add MP25 support
  memory: stm32-fmc2-ebi: check regmap_read return value
  memory: stm32-fmc2-ebi: add MP25 support
  memory: stm32-fmc2-ebi: add MP25 RIF support
  memory: stm32-fmc2-ebi: keep power domain on

 .../memory-controllers/st,stm32-fmc2-ebi.yaml |   7 +-
 drivers/memory/stm32-fmc2-ebi.c               | 729 ++++++++++++++++--
 2 files changed, 686 insertions(+), 50 deletions(-)

-- 
2.25.1