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Mon, 26 Feb 2024 06:02:48 -0600 Received: from localhost (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41QC2lnH056462; Mon, 26 Feb 2024 06:02:47 -0600 Date: Mon, 26 Feb 2024 17:32:46 +0530 From: Siddharth Vadapalli To: Manivannan Sadhasivam CC: Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Marek Vasut , Yoshihiro Shimoda , Kishon Vijay Abraham I , Serge Semin , , , , , , Subject: Re: [PATCH v3 1/5] PCI: dwc: Refactor dw_pcie_edma_find_chip() API Message-ID: References: <20240226-dw-hdma-v3-0-cfcb8171fc24@linaro.org> <20240226-dw-hdma-v3-1-cfcb8171fc24@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240226-dw-hdma-v3-1-cfcb8171fc24@linaro.org> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On Mon, Feb 26, 2024 at 05:07:26PM +0530, Manivannan Sadhasivam wrote: > In order to add support for Hyper DMA (HDMA), let's refactor the existing > dw_pcie_edma_find_chip() API by moving the common code to separate > functions. > > No functional change. > > Suggested-by: Serge Semin > Signed-off-by: Manivannan Sadhasivam Reviewed-by: Siddharth Vadapalli Regards, Siddharth. > --- > drivers/pci/controller/dwc/pcie-designware.c | 52 +++++++++++++++++++++------- > 1 file changed, 39 insertions(+), 13 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index 250cf7f40b85..193fcd86cf93 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -880,7 +880,17 @@ static struct dw_edma_plat_ops dw_pcie_edma_ops = { > .irq_vector = dw_pcie_edma_irq_vector, > }; > > -static int dw_pcie_edma_find_chip(struct dw_pcie *pci) > +static void dw_pcie_edma_init_data(struct dw_pcie *pci) > +{ > + pci->edma.dev = pci->dev; > + > + if (!pci->edma.ops) > + pci->edma.ops = &dw_pcie_edma_ops; > + > + pci->edma.flags |= DW_EDMA_CHIP_LOCAL; > +} > + > +static int dw_pcie_edma_find_mf(struct dw_pcie *pci) > { > u32 val; > > @@ -900,24 +910,27 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci) > else > val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL); > > - if (val == 0xFFFFFFFF && pci->edma.reg_base) { > - pci->edma.mf = EDMA_MF_EDMA_UNROLL; > - > - val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > - } else if (val != 0xFFFFFFFF) { > - pci->edma.mf = EDMA_MF_EDMA_LEGACY; > + /* Set default mapping format here and update it below if needed */ > + pci->edma.mf = EDMA_MF_EDMA_LEGACY; > > + if (val == 0xFFFFFFFF && pci->edma.reg_base) > + pci->edma.mf = EDMA_MF_EDMA_UNROLL; > + else if (val != 0xFFFFFFFF) > pci->edma.reg_base = pci->dbi_base + PCIE_DMA_VIEWPORT_BASE; > - } else { > + else > return -ENODEV; > - } > > - pci->edma.dev = pci->dev; > + return 0; > +} > > - if (!pci->edma.ops) > - pci->edma.ops = &dw_pcie_edma_ops; > +static int dw_pcie_edma_find_channels(struct dw_pcie *pci) > +{ > + u32 val; > > - pci->edma.flags |= DW_EDMA_CHIP_LOCAL; > + if (pci->edma.mf == EDMA_MF_EDMA_LEGACY) > + val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL); > + else > + val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > > pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val); > pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val); > @@ -930,6 +943,19 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci) > return 0; > } > > +static int dw_pcie_edma_find_chip(struct dw_pcie *pci) > +{ > + int ret; > + > + dw_pcie_edma_init_data(pci); > + > + ret = dw_pcie_edma_find_mf(pci); > + if (ret) > + return ret; > + > + return dw_pcie_edma_find_channels(pci); > +} > + > static int dw_pcie_edma_irq_verify(struct dw_pcie *pci) > { > struct platform_device *pdev = to_platform_device(pci->dev); > > -- > 2.25.1 > >