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[209.85.128.177]) by smtp.gmail.com with ESMTPSA id u18-20020a81a512000000b00607b6c0065fsm1142838ywg.43.2024.02.26.05.43.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Feb 2024 05:43:09 -0800 (PST) Received: by mail-yw1-f177.google.com with SMTP id 00721157ae682-608959cfcbfso30643317b3.3; Mon, 26 Feb 2024 05:43:09 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCXWGEyK37I1/BZLIg775tpFkfmlvMxqpgs5kMiTjzLrvLL98E0jdt7nMyq5tU3I5La1Or+p62SVHQUn20XCH5RBrbeGH6MFyZrAHpu41yQDNtyCgu8wavCbq9WwMdG0f4ZnQxrlnbXw50hf6BFkAlThxeBxiKD3EliqE8u/FgX//zQH1GC3JO+D+/KG X-Received: by 2002:a25:ac8f:0:b0:dc7:1d:5db4 with SMTP id x15-20020a25ac8f000000b00dc7001d5db4mr5324955ybi.34.1708954989329; Mon, 26 Feb 2024 05:43:09 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240219160912.1206647-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240219160912.1206647-4-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20240219160912.1206647-4-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Geert Uytterhoeven Date: Mon, 26 Feb 2024 14:42:57 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 3/4] soc: renesas: Add identification support for RZ/V2H SoC To: Prabhakar Cc: Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fabrizio Castro , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Prabhakar, On Mon, Feb 19, 2024 at 5:10=E2=80=AFPM Prabhakar wrote: > From: Lad Prabhakar > Add support to identify the RZ/V2H (R9A09G057) SoC. > > Signed-off-by: Lad Prabhakar > Reviewed-by: Fabrizio Castro Thanks for your patch! > --- a/drivers/soc/renesas/Kconfig > +++ b/drivers/soc/renesas/Kconfig > @@ -344,6 +344,11 @@ config ARCH_R9A09G011 > help > This enables support for the Renesas RZ/V2M SoC. > > +config ARCH_R9A09G057 > + bool "ARM64 Platform support for RZ/V2H{P}" > + help > + This enables support for the Renesas RZ/V2H{P} SoC variants. "RZ/V2H(P)" (everywhere). > + > endif # ARM64 > --- a/drivers/soc/renesas/renesas-soc.c > +++ b/drivers/soc/renesas/renesas-soc.c > @@ -177,6 +181,11 @@ static const struct renesas_soc soc_rz_g3s __initcon= st __maybe_unused =3D { > .id =3D 0x85e0447, > }; > > +static const struct renesas_soc soc_rz_v2h __initconst __maybe_unused = =3D { > + .family =3D &fam_rzv2h, > + .id =3D 0x847A447, Lower case hex please. > +}; The rest LGTM. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds