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bh=5HgsmUy/QJ0+mc91YMn/OH0OmZCKCaNpc6mj1PBX7x0=; b=XKuYZxOIycao5s/ijRy8JRxuOc V3esM+UT/Gg0r1oeAmX+uHuUxnqslv+y0La5V1j59sA9Ma6C0utAc+N8rBEHtiLFHj05tb37ihI++ Y7dOEVwqYlw7w6/zLjAsEhzvFIRbl+Lmbf94AQuQOZc3r6zg7ev5S7d0sJ4+9r04A4To=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1rebTz-008jE1-G0; Mon, 26 Feb 2024 14:57:27 +0100 Date: Mon, 26 Feb 2024 14:57:27 +0100 From: Andrew Lunn To: Robert Marko Cc: f.fainelli@gmail.com, olteanv@gmail.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next] net: dsa: mv88e6xxx: add Amethyst specific SMI GPIO function Message-ID: References: <20240224203349.1358064-1-robimarko@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240224203349.1358064-1-robimarko@gmail.com> On Sat, Feb 24, 2024 at 09:33:09PM +0100, Robert Marko wrote: > The existing mv88e6xxx_g2_scratch_gpio_set_smi() cannot be used on the > 88E6393X as it requires certain P0_MODE, it also checks the CPU mode > as it impacts the bit setting value. > > This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only > the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap > pin value but it can be changed without restrictions so that GPIO pins > 9 and 10 are used as SMI pins. > > So, introduce Amethyst specific function and call that if the Amethyst > family wants to setup the external PHY. This looks good. The only comment i have is maybe we should rename mv88e6xxx_g2_scratch_gpio_set_smi() to something more specific. It seems it is only applicable to MV88E6XXX_FAMILY_6390, so maybe mv88e6390_g2_scratch_gpio_set_smi()? Reviewed-by: Andrew Lunn Andrew