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[142.68.80.239]) by smtp.gmail.com with ESMTPSA id ol8-20020a0562143d0800b0068fb9bdd7absm2979537qvb.74.2024.02.26.06.06.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Feb 2024 06:06:48 -0800 (PST) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1rebd1-00HHN4-B2; Mon, 26 Feb 2024 10:06:47 -0400 Date: Mon, 26 Feb 2024 10:06:47 -0400 From: Jason Gunthorpe To: Junxian Huang Cc: leon@kernel.org, linux-rdma@vger.kernel.org, linuxarm@huawei.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 for-next 2/2] RDMA/hns: Support userspace configuring congestion control algorithm with QP granularity Message-ID: <20240226140647.GB3220539@ziepe.ca> References: <20240208035038.94668-1-huangjunxian6@hisilicon.com> <20240208035038.94668-3-huangjunxian6@hisilicon.com> <20240221155248.GD13491@ziepe.ca> <26ea175c-fa31-720c-2ac3-41abcb4d398a@hisilicon.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <26ea175c-fa31-720c-2ac3-41abcb4d398a@hisilicon.com> On Thu, Feb 22, 2024 at 03:06:20PM +0800, Junxian Huang wrote: > >> +enum hns_roce_congest_type_flags { > >> + HNS_ROCE_CREATE_QP_FLAGS_DCQCN = 1 << 0, > >> + HNS_ROCE_CREATE_QP_FLAGS_LDCP = 1 << 1, > >> + HNS_ROCE_CREATE_QP_FLAGS_HC3 = 1 << 2, > >> + HNS_ROCE_CREATE_QP_FLAGS_DIP = 1 << 3, > >> +}; > > > > Why are these bit flags if they are exclusive? > > > > Our FW uses bit flags. Although there is no direct relationship between > FW and ABI, but from the perspective of readability, bit flags are also > used consistently here in ABI. Don't do that in uapi. > >> +enum hns_roce_create_qp_comp_mask { > >> + HNS_ROCE_CREATE_QP_MASK_CONGEST_TYPE = 1 << 1, > > > > Why 1<<1 not 1<<0? > > This is to keep consistent with our internal ABI, there are some > features not upstream yet. Nope, pack them tightly. Don't keep an "internal ABI" > >> @@ -114,6 +128,9 @@ struct hns_roce_ib_alloc_ucontext_resp { > >> __u32 reserved; > >> __u32 config; > >> __u32 max_inline_data; > >> + __u8 reserved0; > >> + __u8 congest_type; > > > > Why this layout? > > Same as the 1<<1 issue, to keep consistent with our internal ABI. Same answer Jason