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Date: Mon, 26 Feb 2024 16:34:34 +0100
From: Andrew Lunn <andrew@lunn.ch>
To: =?iso-8859-1?Q?J=E9r=E9mie?= Dautheribes <jeremie.dautheribes@bootlin.com>
Cc: "David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>, Andrew Davis <afd@ti.com>,
	netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	=?iso-8859-1?Q?Miqu=E8l?= Raynal <miquel.raynal@bootlin.com>,
	Yen-Mei Goh <yen-mei.goh@keysight.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>
Subject: Re: [PATCH net-next 2/3] net: phy: dp83826: Add support for phy-mode
 configuration
Message-ID: <aee610ab-2815-42f0-a4e4-5f695238beae@lunn.ch>
References: <20240222103117.526955-1-jeremie.dautheribes@bootlin.com>
 <20240222103117.526955-3-jeremie.dautheribes@bootlin.com>
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In-Reply-To: <20240222103117.526955-3-jeremie.dautheribes@bootlin.com>

On Thu, Feb 22, 2024 at 11:31:16AM +0100, J?r?mie Dautheribes wrote:
> The TI DP83826 PHY can operate in either MII mode or RMII mode.
> By default, it is configured by straps.
> It can also be configured by writing to the bit 5 of register 0x17 - RMII
> and Status Register (RCSR).
> 
> When phydev->interface is rmii, rmii mode must be enabled, otherwise
> mii mode must be set.
> This prevents misconfiguration of hw straps.
> 
> Signed-off-by: J?r?mie Dautheribes <jeremie.dautheribes@bootlin.com>
> ---
>  drivers/net/phy/dp83822.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c
> index 30f2616ab1c2..2d8275e59dcc 100644
> --- a/drivers/net/phy/dp83822.c
> +++ b/drivers/net/phy/dp83822.c
> @@ -100,6 +100,7 @@
>  #define DP83822_WOL_CLR_INDICATION BIT(11)
>  
>  /* RCSR bits */
> +#define DP83822_RMII_MODE_EN	BIT(5)
>  #define DP83822_RGMII_MODE_EN	BIT(9)
>  #define DP83822_RX_CLK_SHIFT	BIT(12)
>  #define DP83822_TX_CLK_SHIFT	BIT(11)
> @@ -500,6 +501,16 @@ static int dp83826_config_init(struct phy_device *phydev)
>  	u16 val, mask;
>  	int ret;
>  
> +	if (phydev->interface == PHY_INTERFACE_MODE_RMII)
> +		ret = phy_set_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
> +				       DP83822_RMII_MODE_EN);
> +	else
> +		ret = phy_clear_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
> +					 DP83822_RMII_MODE_EN);

I would probably add a test for MII and return -EINVAL if asked to do
something else altogether.

	  Andrew