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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?+UpaIJpI0MPTb3jl8MBIOUWOcwFZ0ZC7n81CV22HFutax0F7F1sRiirFxB+Y?= =?us-ascii?Q?47eA9+TKTagCu3hks6aTlSrWVubzmnAfjwK+cv1mdbQdyfEhWdUslwWdltVH?= =?us-ascii?Q?nrDCKXxUxIVETZLYR8XZVpBh9e+mZbOR5WD5YDlYXoOl/iJK8MOJThONFlLc?= =?us-ascii?Q?XDvUWsCyI1PGNpl3p71AJO3se1gdCmuAmhSvS17mjpy2cz40I602Wwa5YaL3?= =?us-ascii?Q?9LWYbWwnJIILtbcQvYDTRQSU1LncuvR4eRL+FJ+DPgpUjqDZj/axyIAM5paC?= =?us-ascii?Q?wo2kEW91EGZh/hVUekFol+rswC//cAfKapKf0/LdWc4borU6XYjLY8iAIgTp?= =?us-ascii?Q?lWeiOzIOw1deoXXbvsk4Kr4hKsuYVHgphxgtBp3Nc9BaQdIkjUJdULLhoF/y?= =?us-ascii?Q?Z7llmJidnjMbms7ECmeP022y89oGpC6GM1ZmKfDnmzlLA0euel4GbBJmke7L?= =?us-ascii?Q?5i/xM57UzVAUZwviGmeUukDfwCFBdCOpXIJaBI6o79wTKSh7nUoqOt0w+uj2?= =?us-ascii?Q?vWYUhaw948JVBZ9cSuZM7nQTDJVA3XMd5ts//PaIvRhuMsWC2SdEQhvh6hBN?= =?us-ascii?Q?LJk4dD2UFHYtIkGtSgZ5SdWYQQSs/XGg6w1c0wgKSzZ3r9fC3F6gwn75eGeD?= =?us-ascii?Q?djkXX6ggMw3ZJXD4KLlbT3TIdnWKj4kNUo+VjxoR1nBVpoBgaaTWJUhM1RpV?= =?us-ascii?Q?hIF5p5v2f8aydxDKcC6Vm+UgU/8/gVIIcnMSdTLL9HYCOfSOccJKIfWsRMNe?= =?us-ascii?Q?pZ18pyIXH5a5sE1sql4MWtSindDJn7hcHhu0FrycojveADAuI3R+vKma5DaE?= =?us-ascii?Q?+wbnZaBMxrT6Ot/gUOM4XjdpbLatBujG18h1/+z3xH64QdNd7OXn6XMSbBIC?= =?us-ascii?Q?/0BjozbsV3cmvsw3jYdGgfN8FwPvZ9xrlx3zQWwYqbKV/VjxBgNFwRVESbc2?= =?us-ascii?Q?QQu5jYg20c+htgsJJCfvM4xBJ+qwKRJF1u8Rr4AUMRTiSjtKuFP1r2hbsWG1?= =?us-ascii?Q?vgkmNgOZxkbthjWR9Vi17CH62r+J+FRMS1Jx+GUaepVOAEOo7vyvZTHVnFPp?= =?us-ascii?Q?wB2JNVOIdYYPEd9jaKn1ewt3HQpzUgtp990LJfQZy+5GS+LOafodQHzXh8X3?= =?us-ascii?Q?6Ak0pycpIvcZOOhDT/Xev6O+Ckv4HHksSess9DxvPqAu/5u7E4T5k0YPK7rr?= =?us-ascii?Q?sJ2pKbOubnonVt3RGbM9MNNQFqSK39sWyFtTrx5JuR2yN9/OZvllNnuauKLY?= =?us-ascii?Q?YcLk11M9zNkeHFnpa43igcF7Kima7sDn+iSCPKMZ5VZizk+z+aLzNxb3v9WS?= =?us-ascii?Q?U5b/+/rk/7OEsHeJYdyTlDvnlDk5QbsL4CcYlhnivuTifzAWuxGfN0t1AFYG?= =?us-ascii?Q?T+4PNdLSKOQpCAApYzINts7+bH8n2xLvvM5snlEErf66CMvfLeLW+6rSy2GT?= =?us-ascii?Q?yyXgG+oLIIFb6Bj0m61NvNQN9OX4sE+HOC22nKAG+vZTXm3nNwgUCa/JzM3O?= =?us-ascii?Q?wMDo9+0vxX88jQj+04h16dQshvVWy3cbdnU4KF8PqPeg9o5VS9Ax0eCNyzWt?= =?us-ascii?Q?uoNqs1QmmGREktRsdvP5LA+kU43g0dBHUTN1KWtO?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ddf17bf1-11fe-4a18-ac16-08dc36e7ad25 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2024 16:26:25.2586 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ZRcDbFKX3QIquHQfq89Aomtk2roTxsw/6Wa5QHzDnDs7EOubwI8mEcUQDEfaqbmum6Vb6yV3J0SFK7cFRTsOlg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB8347 On Mon, Feb 26, 2024 at 05:07:27PM +0530, Manivannan Sadhasivam wrote: > In the case of Hyper DMA (HDMA) present in DWC controllers, there is no way > the drivers can auto detect the number of read/write channels as like its > predecessor embedded DMA (eDMA). So the glue drivers making use of HDMA > have to pass the channels count during probe. > > To accommodate that, let's skip finding the channels if the channels count > were already passed by glue drivers. If the channels count passed were > wrong in any form, then the existing sanity check will catch it. > > Suggested-by: Serge Semin > Reviewed-by: Siddharth Vadapalli Reviewed-by: Frank Li > Signed-off-by: Manivannan Sadhasivam > --- > drivers/pci/controller/dwc/pcie-designware.c | 16 +++++++++------- > 1 file changed, 9 insertions(+), 7 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index 193fcd86cf93..ce273c3c5421 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -927,13 +927,15 @@ static int dw_pcie_edma_find_channels(struct dw_pcie *pci) > { > u32 val; > > - if (pci->edma.mf == EDMA_MF_EDMA_LEGACY) > - val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL); > - else > - val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > - > - pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val); > - pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val); > + if (!pci->edma.ll_wr_cnt || !pci->edma.ll_rd_cnt) { > + if (pci->edma.mf == EDMA_MF_EDMA_LEGACY) > + val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL); > + else > + val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > + > + pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val); > + pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val); > + } > > /* Sanity check the channels count if the mapping was incorrect */ > if (!pci->edma.ll_wr_cnt || pci->edma.ll_wr_cnt > EDMA_MAX_WR_CH || > > -- > 2.25.1 >