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References: <20240224203349.1358064-1-robimarko@gmail.com> <cb5c185f-1946-4548-9918-01548e9dd9cf@lunn.ch>
In-Reply-To: <cb5c185f-1946-4548-9918-01548e9dd9cf@lunn.ch>
From: Robert Marko <robimarko@gmail.com>
Date: Mon, 26 Feb 2024 17:25:00 +0100
Message-ID: <CAOX2RU7xKM6ywGbzfB2ZCmYadJYG1uq=doTBfPGNnaYaocmG4Q@mail.gmail.com>
Subject: Re: [PATCH net-next] net: dsa: mv88e6xxx: add Amethyst specific SMI
 GPIO function
To: Andrew Lunn <andrew@lunn.ch>
Cc: f.fainelli@gmail.com, olteanv@gmail.com, davem@davemloft.net, 
	edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, 
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Content-Type: text/plain; charset="UTF-8"

On Mon, 26 Feb 2024 at 14:57, Andrew Lunn <andrew@lunn.ch> wrote:
>
> On Sat, Feb 24, 2024 at 09:33:09PM +0100, Robert Marko wrote:
> > The existing mv88e6xxx_g2_scratch_gpio_set_smi() cannot be used on the
> > 88E6393X as it requires certain P0_MODE, it also checks the CPU mode
> > as it impacts the bit setting value.
> >
> > This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only
> > the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap
> > pin value but it can be changed without restrictions so that GPIO pins
> > 9 and 10 are used as SMI pins.
> >
> > So, introduce Amethyst specific function and call that if the Amethyst
> > family wants to setup the external PHY.
>
> This looks good. The only comment i have is maybe we should rename
> mv88e6xxx_g2_scratch_gpio_set_smi() to something more specific. It
> seems it is only applicable to MV88E6XXX_FAMILY_6390, so maybe
> mv88e6390_g2_scratch_gpio_set_smi()?

That sounds like a good idea, want me to send a v2 with the rename as well?

Regards,
Robert
>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
>
>     Andrew