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Tue, 27 Feb 2024 03:15:03 GMT Received: from [10.216.14.152] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 26 Feb 2024 19:14:56 -0800 Message-ID: Date: Tue, 27 Feb 2024 08:44:53 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.13.1 Subject: Re: [PATCH v7 3/7] PCI: qcom: Add ICC bandwidth vote for CPU to PCIe path Content-Language: en-US To: Konrad Dybcio , Bjorn Andersson , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , Rob Herring , Johan Hovold , Brian Masney , Georgi Djakov CC: , , , , , , , , , Bryan O'Donoghue References: <20240223-opp_support-v7-0-10b4363d7e71@quicinc.com> <20240223-opp_support-v7-3-10b4363d7e71@quicinc.com> <53f486d1-94c7-4dd9-89fc-d80a92301700@linaro.org> From: Krishna Chaitanya Chundru In-Reply-To: <53f486d1-94c7-4dd9-89fc-d80a92301700@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: NagUTDU7pvt2aIge6frUEj6VXHrP0rNI X-Proofpoint-GUID: NagUTDU7pvt2aIge6frUEj6VXHrP0rNI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-26_11,2024-02-26_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 clxscore=1015 mlxscore=0 malwarescore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2402270024 On 2/24/2024 5:32 AM, Konrad Dybcio wrote: > On 23.02.2024 15:48, Krishna chaitanya chundru wrote: >> To access PCIe registers, PCIe BAR space, config space the CPU-PCIe >> ICC(interconnect consumers) path should be voted otherwise it may >> lead to NoC(Network on chip) timeout. We are surviving because of >> other driver vote for this path. >> As there is less access on this path compared to PCIe to mem path >> add minimum vote i.e 1KBps bandwidth always. >> >> In suspend remove the disable this path after register space access >> is done. >> >> Reviewed-by: Bryan O'Donoghue >> Signed-off-by: Krishna chaitanya chundru >> --- > > [...] > >> >> + /* Remove cpu path vote after all the register access is done */ >> + ret = icc_disable(pcie->icc_cpu); >> + if (ret) { >> + dev_err(dev, "failed to disable icc path of cpu-pcie: %d\n", ret); >> + if (pcie->suspended) { >> + qcom_pcie_host_init(&pcie->pci->pp); >> + pcie->suspended = false; >> + } >> + qcom_pcie_icc_opp_update(pcie); > > This doesn't compile (you rename it in patch 6, this is patch 3) > > Konrad > I will fix this in my next series. - Krishna Chaitanya.