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From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, "open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" <imx@lists.linux.dev>, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" <linux-arm-kernel@lists.infradead.org>, open list <linux-kernel@vger.kernel.org>
Cc: Frank Li <Frank.Li@nxp.com>
Subject: Re: [PATCH 3/3] arm64: dts: imx8qm-mek: add flexspi0 support
Date: Tue, 27 Feb 2024 08:42:15 +0100
Message-ID: <12393206.O9o76ZdvQC@steina-w>
Organization: TQ-Systems GmbH
In-Reply-To: <20240226203358.275986-3-Frank.Li@nxp.com>
References: <20240226203358.275986-1-Frank.Li@nxp.com> <20240226203358.275986-3-Frank.Li@nxp.com>
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Hi,

Am Montag, 26. Februar 2024, 21:33:57 CET schrieb Frank Li:
> Add flexspi0 support for imx8qm-mek board.
>=20
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 38 ++++++++++++++++++++
>  1 file changed, 38 insertions(+)
>=20
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/bo=
ot/dts/freescale/imx8qm-mek.dts
> index 800dcb67642b1..7077e394e855b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> @@ -101,6 +101,23 @@ spidev0: spi@0 {
>  	};
>  };
> =20
> +&flexspi0 {
> +	pinctrl-names =3D "default";
> +	pinctrl-0 =3D <&pinctrl_flexspi0>;
> +	nxp,fspi-dll-slvdly =3D <4>;
> +	status =3D "okay";
> +
> +	flash0: mt35xu512aba@0 {
> +		reg =3D <0>;
> +		#address-cells =3D <1>;
> +		#size-cells =3D <1>;

Using '#address-cells' and '#size-cells' in mtd (and thus spi-nor )
is deprecated, please refer to Documentation/devicetree/bindings/mtd/mtd.ya=
ml.

You need to add a partitions subnode instead:
> partitions {
> 	compatible =3D "fixed-partitions";
> 	#address-cells =3D <1>;
> 	#size-cells =3D <1>;
> };

Best regards,
Alexander

> +		compatible =3D "jedec,spi-nor";
> +		spi-max-frequency =3D <133000000>;
> +		spi-tx-bus-width =3D <8>;
> +		spi-rx-bus-width =3D <8>;
> +	};
> +};
> +
>  &fec1 {
>  	pinctrl-names =3D "default";
>  	pinctrl-0 =3D <&pinctrl_fec1>;
> @@ -199,6 +216,27 @@ IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10		0x21
>  		>;
>  	};
> =20
> +	pinctrl_flexspi0: flexspi0grp {
> +		fsl,pins =3D <
> +			IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0     0x06000021
> +			IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1     0x06000021
> +			IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2     0x06000021
> +			IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3     0x06000021
> +			IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS         0x06000021
> +			IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B     0x06000021
> +			IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B     0x06000021
> +			IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK       0x06000021
> +			IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK       0x06000021
> +			IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0     0x06000021
> +			IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1     0x06000021
> +			IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2     0x06000021
> +			IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3     0x06000021
> +			IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS         0x06000021
> +			IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B     0x06000021
> +			IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B     0x06000021
> +		>;
> +	};
> +
>  	pinctrl_lpuart0: lpuart0grp {
>  		fsl,pins =3D <
>  			IMX8QM_UART0_RX_DMA_UART0_RX				0x06000020
>=20


=2D-=20
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