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Tue, 27 Feb 2024 01:07:48 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Tue, 27 Feb 2024 01:07:45 -0700 Date: Tue, 27 Feb 2024 08:07:02 +0000 From: Conor Dooley To: Vignesh Raghavendra CC: =?iso-8859-1?Q?Th=E9o?= Lebrun , Conor Dooley , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Roger Quadros , Peter Chen , Pawel Laszczak , Nishanth Menon , Tero Kristo , Thomas Petazzoni , =?iso-8859-1?Q?Gr=E9gory?= Clement , Kevin Hilman , Alan Stern , , , , Subject: Re: [PATCH v3 1/8] dt-bindings: usb: ti,j721e-usb: drop useless compatible list Message-ID: <20240227-radiated-fame-57a2e685f1b0@wendy> References: <20240223-j7200-usb-suspend-v3-0-b41c9893a130@bootlin.com> <20240223-j7200-usb-suspend-v3-1-b41c9893a130@bootlin.com> <20240223-clarity-variably-206b01b7276a@spud> <20240226-portable-rockslide-e501667a0d9a@wendy> <37ab0886-0cd1-4188-9177-8b7ef0ad9eca@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="+JNVmkXccn+hyfZl" Content-Disposition: inline In-Reply-To: <37ab0886-0cd1-4188-9177-8b7ef0ad9eca@ti.com> --+JNVmkXccn+hyfZl Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Feb 27, 2024 at 09:54:30AM +0530, Vignesh Raghavendra wrote: > On 26/02/24 20:05, Th=E9o Lebrun wrote: > > On Mon Feb 26, 2024 at 12:56 PM CET, Conor Dooley wrote: > >> On Mon, Feb 26, 2024 at 11:33:06AM +0100, Th=E9o Lebrun wrote: > >>> Hello Conor, > >>> > >>> On Fri Feb 23, 2024 at 7:12 PM CET, Conor Dooley wrote: > >>>> On Fri, Feb 23, 2024 at 05:05:25PM +0100, Th=E9o Lebrun wrote: > >>>>> Compatible can be A or B, not A or B or A+B. Remove last option. > >>>>> A=3Dti,j721e-usb and B=3Dti,am64-usb. > >>>>> > >>>>> Signed-off-by: Th=E9o Lebrun > >>>>> --- > >>>>> Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml | 9 +++---= --- > >>>>> 1 file changed, 3 insertions(+), 6 deletions(-) > >>>>> > >>>>> diff --git a/Documentation/devicetree/bindings/usb/ti,j721e-usb.yam= l b/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml > >>>>> index 95ff9791baea..949f45eb45c2 100644 > >>>>> --- a/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml > >>>>> +++ b/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml > >>>>> @@ -11,12 +11,9 @@ maintainers: > >>>>> =20 > >>>>> properties: > >>>>> compatible: > >>>>> - oneOf: > >>>>> - - const: ti,j721e-usb > >>>>> - - const: ti,am64-usb > >>>>> - - items: > >>>>> - - const: ti,j721e-usb > >>>>> - - const: ti,am64-usb > >>>> > >>>> Correct, this makes no sense. The devices seem to be compatible thou= gh, > >>>> so I would expect this to actually be: > >>>> oneOf: > >>>> - const: ti,j721e-usb > >>>> - items: > >>>> - const: ti,am64-usb > >>>> - const: ti,j721e-usb > >>> > >>> I need your help to grasp what that change is supposed to express? Wo= uld > >>> you mind turning it into english sentences? > >>> A=3Dti,j721e-usb and B=3Dti,am64-usb. My understanding of your propos= al is > >>> that a device can either be compat with A or B. But B is compatible > >>> with A so you express it as a list of items. If B is compat with A th= en > >>> A is compat with B. Does the order of items matter? > >> > >> The two devices are compatible with each other, based on an inspection= of > >> the driver and the existing "A+B" setup. If this was a newly submitted > >> binding, "B" would not get approved because "A+B" allows support witho= ut > >> software changes and all that jazz. > >> > >> Your patch says that allowing "A", "B" and "A+B" makes no sense and you > >> suggest removing "A+B". I am agreeing that it makes no sense to allow > >> all 3 of these situations. > >> > >> What I also noticed is other problems with the binding. What should ha= ve > >> been "A+B" is actually documented as "B+A", but that doesn't make sense > >> when the originally supported device is "A". This A and B stuff confused me, I should just have used the actual compatibles. I meant | What should have been "B+A" is actually documented as "A+B", but that | doesn't make sense when the originally supported device is "A" > >> > >> Therefore my suggestion was to only allow "A" and "A+B", which is what > >> we would (hopefully) tell you to do were you submitting the am64 suppo= rt > >> as a new patch today. > >=20 > > Thank you for the in-depth explanation! It makes much more sense now, > > especially the handling of historic stuff that ideally wouldn't have > > been done this way but that won't be changed from now on. > >=20 >=20 > IIRC, idea behind adding new compatible for AM64 even though register > map is very much compatible is just being future proof as AM64 and J721e > belong to different product groups and thus have differences wrt SoC > level integration etc which may need SoC specific handling later on. That is fine, I don't think anyone here is disputing a soc-specific compatible existing for this device. > Also, note that AM64 SoC support was added long after J721e. So ideally > should be B+A if at all we need a fallback compatible. Correct, I accidentally wrote "A+B", but you can see that that conflicted with the actual example I had given above. > I don't see any DT (now or in the past) using >=20 > compatible =3D B,A or compatible =3D A,B >=20 > So do we really need A+B to be supported by binding? Given the mistake, I am going to take this as meaning should the fallback be supported. My take is that if we are going to remove something, it should be "ti,am64-usb" isolation that should go. The devicetrees can be update without concerns about compatibility. Cheers, Conor. --+JNVmkXccn+hyfZl Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZd2YIQAKCRB4tDGHoIJi 0pqQAQCXBm9gvKWGSQ2qQ4acHNjGMTaMyayfkfljweUbpW9QywD/ehe10Pr1OdhV WFOesqEw7mNUg37j97LIT669LzLlmwM= =VE72 -----END PGP SIGNATURE----- --+JNVmkXccn+hyfZl--