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Date: Tue, 27 Feb 2024 10:50:07 +0000
From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: Bastien Curutchet <bastien.curutchet@bootlin.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, Pavel Machek <pavel@ucw.cz>,
	Lee Jones <lee@kernel.org>,
	Richard Cochran <richardcochran@gmail.com>,
	Andrew Lunn <andrew@lunn.ch>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
	devicetree@vger.kernel.org, linux-leds@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	herve.codina@bootlin.com, christophercordahi@nanometrics.ca
Subject: Re: [PATCH v2 3/6] net: phy: DP83640: Add LED handling
Message-ID: <Zd2+XwM7hIpycjVO@shell.armlinux.org.uk>
References: <20240227093945.21525-1-bastien.curutchet@bootlin.com>
 <20240227093945.21525-4-bastien.curutchet@bootlin.com>
 <20240227105806.7201b34a@device-28.home>
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Sender: Russell King (Oracle) <linux@armlinux.org.uk>

On Tue, Feb 27, 2024 at 10:58:06AM +0100, Maxime Chevallier wrote:
> > +		val = phy_read(phydev, PHYCR) & ~(LED_CNFG_1 | LED_CNFG_0);
> > +		switch (mode) {
> > +		case DP83640_LED_MODE_1:
> > +			val |= LED_CNFG_0;
> > +		break;
> > +		case DP83640_LED_MODE_2:
> > +			/* Keeping LED_CNFG_1 and LED_CNFG_0 unset */
> > +			break;
> > +		case DP83640_LED_MODE_3:
> > +			val |= LED_CNFG_1;
> > +			break;
> > +		default:
> > +			return -EINVAL;
> > +		}
> > +		phy_write(phydev, PHYCR, val);

This should also be phy_modify() as well. Any read-modify-write sequence
is open to race conditions if it is open coded because the bus lock will
be dropped after the read and regained on the write.

-- 
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