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Date: Tue, 27 Feb 2024 12:13:45 +0000
From: Conor Dooley <conor.dooley@microchip.com>
To: Samuel Holland <samuel.holland@sifive.com>
CC: Palmer Dabbelt <palmer@dabbelt.com>, <linux-riscv@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 0/4] riscv: 64-bit NOMMU fixes and enhancements
Message-ID: <20240227-footage-porridge-949a43ee8ecb@wendy>
References: <20240227003630.3634533-1-samuel.holland@sifive.com>
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On Mon, Feb 26, 2024 at 04:34:45PM -0800, Samuel Holland wrote:
> This series aims to improve support for NOMMU, specifically by making it
> easier to test NOMMU kernels in QEMU and on various widely-available
> hardware (errata permitting). After all, everything supports Svbare...
>=20
> After applying this series, a NOMMU kernel based on defconfig (changing
> only the three options below*) boots to userspace on QEMU when passed as
> -kernel.
>=20
>   # CONFIG_RISCV_M_MODE is not set
>   # CONFIG_MMU is not set
>   CONFIG_NONPORTABLE=3Dy
>=20
> *if you are using LLD, you must also disable BPF_SYSCALL and KALLSYMS,
> because LLD bails on out-of-range references to undefined weak symbols.

That's not new to these patches though, right? IIRC that's an existing
issue.

Cheers,
Conor.

>=20
>=20
> Samuel Holland (4):
>   riscv: Fix TASK_SIZE on 64-bit NOMMU
>   riscv: Fix loading 64-bit NOMMU kernels past the start of RAM
>   riscv: Remove MMU dependency from Zbb and Zicboz
>   riscv: Allow NOMMU kernels to run in S-mode
>=20
>  arch/riscv/Kconfig               | 17 ++++++++++-------
>  arch/riscv/include/asm/page.h    |  2 +-
>  arch/riscv/include/asm/pgtable.h |  2 +-
>  arch/riscv/mm/init.c             |  2 +-
>  4 files changed, 13 insertions(+), 10 deletions(-)
>=20
> --=20
> 2.43.0
>=20

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