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Tue, 27 Feb 2024 05:19:03 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Tue, 27 Feb 2024 05:19:02 -0700 Date: Tue, 27 Feb 2024 12:18:19 +0000 From: Conor Dooley To: Samuel Holland CC: Palmer Dabbelt , , Subject: Re: [PATCH 2/4] riscv: Fix loading 64-bit NOMMU kernels past the start of RAM Message-ID: <20240227-unfitting-rectangle-cd0f23a4f3f1@wendy> References: <20240227003630.3634533-1-samuel.holland@sifive.com> <20240227003630.3634533-3-samuel.holland@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="tfS8TWg82l+tp82L" Content-Disposition: inline In-Reply-To: <20240227003630.3634533-3-samuel.holland@sifive.com> --tfS8TWg82l+tp82L Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Feb 26, 2024 at 04:34:47PM -0800, Samuel Holland wrote: > commit 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear > mapping") added logic to allow using RAM below the kernel load address. > However, this does not work for NOMMU, where PAGE_OFFSET is fixed to the > kernel load address. Since that range of memory corresponds to PFNs > below ARCH_PFN_OFFSET, mm initialization runs off the beginning of > mem_map and corrupts adjacent kernel memory. Fix this by restoring the > previous behavior for NOMMU kernels. >=20 > Fixes: 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear mapping= ") This commit was a year ago, why has nobody reported this as being an issue before? > Signed-off-by: Samuel Holland > --- >=20 > arch/riscv/include/asm/page.h | 2 +- > arch/riscv/mm/init.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h > index 57e887bfa34c..94b3d6930fc3 100644 > --- a/arch/riscv/include/asm/page.h > +++ b/arch/riscv/include/asm/page.h > @@ -89,7 +89,7 @@ typedef struct page *pgtable_t; > #define PTE_FMT "%08lx" > #endif > =20 > -#ifdef CONFIG_64BIT > +#if defined(CONFIG_64BIT) && defined(CONFIG_MMU) > /* > * We override this value as its generic definition uses __pa too early = in > * the boot process (before kernel_map.va_pa_offset is set). > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c > index fa34cf55037b..0c00efc75643 100644 > --- a/arch/riscv/mm/init.c > +++ b/arch/riscv/mm/init.c > @@ -232,7 +232,7 @@ static void __init setup_bootmem(void) > * In 64-bit, any use of __va/__pa before this point is wrong as we > * did not know the start of DRAM before. > */ > - if (IS_ENABLED(CONFIG_64BIT)) > + if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_MMU)) > kernel_map.va_pa_offset =3D PAGE_OFFSET - phys_ram_base; > =20 > /* > --=20 > 2.43.0 >=20 --tfS8TWg82l+tp82L Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZd3TCwAKCRB4tDGHoIJi 0s/zAQCS852scSonjy1Gj7apcbh2fxvVfWDrwwOmuGUBrmho0QEA44dOATliF775 3hhKWqWXuZEZSrQinzVHcHmNhWBkywA= =Sol7 -----END PGP SIGNATURE----- --tfS8TWg82l+tp82L--