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From: Bartosz Golaszewski <brgl@bgdev.pl>
Date: Tue, 27 Feb 2024 14:14:40 +0100
Message-ID: <CAMRc=McUsv9ic5aU7oAaJ06zWtpna0CkkxPWr2nqPhEig5vPOg@mail.gmail.com>
Subject: Re: [PATCH] gpio: 74x164: Enable output pins after registers are reset
To: Arturas Moskvinas <arturas.moskvinas@gmail.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>, linus.walleij@linaro.org, 
	u.kleine-koenig@pengutronix.de, linux-gpio@vger.kernel.org, 
	linux-kernel@vger.kernel.org
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On Tue, Feb 27, 2024 at 7:58=E2=80=AFAM Arturas Moskvinas
<arturas.moskvinas@gmail.com> wrote:
>
> Hello,
>
> On 2/26/24 16:01, Andy Shevchenko wrote:
> > On Mon, Feb 26, 2024 at 03:46:56PM +0200, Arturas Moskvinas wrote:
> >> Move output enabling after chip registers are cleared.
> > Does this fix anything? If so, maybe elaborate a bit the potential beha=
vioural
> > changes on the real lines.
>
> Chip outputs are enabled[1] before actual reset is performed[2] which
> might cause pin output value to flip flop if previous pin value was set
> to 1 in chip. Change fixes that behavior by making sure chip is fully
> reset before all outputs are enabled.
>
> Flip-flop can be noticed when module is removed and inserted again and
> one of the pins was changed to 1 before removal. 100 microsecond
> flipping is noticeable on oscilloscope (100khz SPI bus).
>
> For a properly reset chip - output is enabled around 100 microseconds
> (on 100khz SPI bus) later during probing process hence should be
> irrelevant behavioral change.
>
> [1] -
> https://elixir.bootlin.com/linux/v6.7.4/source/drivers/gpio/gpio-74x164.c=
#L130
> [2] -
> https://elixir.bootlin.com/linux/v6.7.4/source/drivers/gpio/gpio-74x164.c=
#L150
>
> Arturas Moskvinas

And this is precisely the kind of information that needs to go into
commit messages. I can tell *what* you're doing by looking at the
code. What I can't tell is *why*.

Bartosz