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Tue, 27 Feb 2024 08:13:00 -0600 Received: from [172.24.227.94] (uda0132425.dhcp.ti.com [172.24.227.94]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41RECuKD000420; Tue, 27 Feb 2024 08:12:56 -0600 Message-ID: Date: Tue, 27 Feb 2024 19:42:55 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/4] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes Content-Language: en-US To: Josua Mayer , Nishanth Menon , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Yazan Shhady , , , , Suman Anna , Grygorii Strashko , MD Danish Anwar References: <20240219-add-am64-som-v7-0-0e6e95b0a05d@solid-run.com> <20240219-add-am64-som-v7-2-0e6e95b0a05d@solid-run.com> From: Vignesh Raghavendra In-Reply-To: <20240219-add-am64-som-v7-2-0e6e95b0a05d@solid-run.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 19/02/24 20:33, Josua Mayer wrote: > From: Suman Anna > > The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) > to manage/generate Industrial Ethernet functions such as time stamping. > Each IEP sub-module is sourced from an internal clock mux that can be > derived from either of the IP instance's ICSSG_IEP_GCLK or from another > internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG > instances. The IEP clock is currently configured to be derived > indirectly from the ICSSG_ICLK running at 250 MHz. > > Signed-off-by: Vignesh Raghavendra > Signed-off-by: Grygorii Strashko > Signed-off-by: Suman Anna > Signed-off-by: MD Danish Anwar > Signed-off-by: Josua Mayer > --- This patch is already picked as part of different series: https://lore.kernel.org/all/20240215103036.2825096-2-danishanwar@ti.com/ > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > index e348114f42e0..9d2dad8ae8df 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > @@ -1244,6 +1244,18 @@ icssg0_iepclk_mux: iepclk-mux@30 { > }; > }; > > + icssg0_iep0: iep@2e000 { > + compatible = "ti,am654-icss-iep"; > + reg = <0x2e000 0x1000>; > + clocks = <&icssg0_iepclk_mux>; > + }; > + > + icssg0_iep1: iep@2f000 { > + compatible = "ti,am654-icss-iep"; > + reg = <0x2f000 0x1000>; > + clocks = <&icssg0_iepclk_mux>; > + }; > + > icssg0_mii_rt: mii-rt@32000 { > compatible = "ti,pruss-mii", "syscon"; > reg = <0x32000 0x100>; > @@ -1385,6 +1397,18 @@ icssg1_iepclk_mux: iepclk-mux@30 { > }; > }; > > + icssg1_iep0: iep@2e000 { > + compatible = "ti,am654-icss-iep"; > + reg = <0x2e000 0x1000>; > + clocks = <&icssg1_iepclk_mux>; > + }; > + > + icssg1_iep1: iep@2f000 { > + compatible = "ti,am654-icss-iep"; > + reg = <0x2f000 0x1000>; > + clocks = <&icssg1_iepclk_mux>; > + }; > + > icssg1_mii_rt: mii-rt@32000 { > compatible = "ti,pruss-mii", "syscon"; > reg = <0x32000 0x100>; > -- Regards Vignesh