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Tue, 27 Feb 2024 11:22:13 -0800 (PST) Message-ID: <9673cbe7-41ec-4261-9be8-fc5191ade56c@sifive.com> Date: Tue, 27 Feb 2024 13:22:12 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] riscv: Fix loading 64-bit NOMMU kernels past the start of RAM Content-Language: en-US To: Conor Dooley Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20240227003630.3634533-1-samuel.holland@sifive.com> <20240227003630.3634533-3-samuel.holland@sifive.com> <20240227-unfitting-rectangle-cd0f23a4f3f1@wendy> From: Samuel Holland In-Reply-To: <20240227-unfitting-rectangle-cd0f23a4f3f1@wendy> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Conor, On 2024-02-27 6:18 AM, Conor Dooley wrote: > On Mon, Feb 26, 2024 at 04:34:47PM -0800, Samuel Holland wrote: >> commit 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear >> mapping") added logic to allow using RAM below the kernel load address. >> However, this does not work for NOMMU, where PAGE_OFFSET is fixed to the >> kernel load address. Since that range of memory corresponds to PFNs >> below ARCH_PFN_OFFSET, mm initialization runs off the beginning of >> mem_map and corrupts adjacent kernel memory. Fix this by restoring the >> previous behavior for NOMMU kernels. >> >> Fixes: 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear mapping") > > This commit was a year ago, why has nobody reported this as being an > issue before? I can think of a few reasons: 1) NOMMU users are likely to be using RV32, which is not affected. 2) Before patch 4 of this series, NOMMU implied M-mode, so there was nothing in the way to prevent loading Linux at the very beginning of RAM. (U-Boot/SPL relocates itself to the end of RAM, so it would not cause a problem.) 3) Platforms where RAM does not begin at exactly 0x80000000 would be affected, there are several workarounds: change the start of RAM (for soft cores), change PAGE_OFFSET, or change the memory ranges in the devicetree to exclude anything below PAGE_OFFSET. It's possible that nobody was affected, but it's still technically a regression (a hypothetical platform with RAM from 0x40000000 to 0xc0000000 would crash instead of only being able to use half its RAM), so I thought it still deserved the Fixes: tag. Regards, Samuel >> Signed-off-by: Samuel Holland >> --- >> >> arch/riscv/include/asm/page.h | 2 +- >> arch/riscv/mm/init.c | 2 +- >> 2 files changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h >> index 57e887bfa34c..94b3d6930fc3 100644 >> --- a/arch/riscv/include/asm/page.h >> +++ b/arch/riscv/include/asm/page.h >> @@ -89,7 +89,7 @@ typedef struct page *pgtable_t; >> #define PTE_FMT "%08lx" >> #endif >> >> -#ifdef CONFIG_64BIT >> +#if defined(CONFIG_64BIT) && defined(CONFIG_MMU) >> /* >> * We override this value as its generic definition uses __pa too early in >> * the boot process (before kernel_map.va_pa_offset is set). >> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c >> index fa34cf55037b..0c00efc75643 100644 >> --- a/arch/riscv/mm/init.c >> +++ b/arch/riscv/mm/init.c >> @@ -232,7 +232,7 @@ static void __init setup_bootmem(void) >> * In 64-bit, any use of __va/__pa before this point is wrong as we >> * did not know the start of DRAM before. >> */ >> - if (IS_ENABLED(CONFIG_64BIT)) >> + if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_MMU)) >> kernel_map.va_pa_offset = PAGE_OFFSET - phys_ram_base; >> >> /* >> -- >> 2.43.0 >>