Received: by 2002:a05:7208:9594:b0:7e:5202:c8b4 with SMTP id gs20csp2139319rbb; Tue, 27 Feb 2024 11:49:57 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVwVp99oTYReCZufLq8cHvp8jSpRvNYAi9BqpS0Pr0wpecsrI96VkTc2wHP4C34M6M0W7jE1GGFsPrew2Ls0Zig8GZ5Koc6TVB2d8PPsg== X-Google-Smtp-Source: AGHT+IF2sxlrSISpfrvqf9zAbjUjZhDRRiaDWUQB2Ds5koxNOvoyA3fiVP8LGO9LD1iest/aN8rv X-Received: by 2002:a17:90a:7286:b0:29a:57c6:bdf7 with SMTP id e6-20020a17090a728600b0029a57c6bdf7mr9522230pjg.20.1709063396911; Tue, 27 Feb 2024 11:49:56 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1709063396; cv=pass; d=google.com; s=arc-20160816; b=JH1MZZ4hBAhs4QzxvREmk3tQCp5jeF4w/+SGLpanvFq67J0Vy3XxzlBqiHqhk3EfZh rYZ032RfsuC5ZpRezhIXHDhhCHfm+zY8iMEI6RBzbQ++B7DcxwS3m5P/u6ZzznsA/kys wg8USAQ/2lguYT2aWJpikrwkiJbab81LG31J6b+GxxieqdmnL+8gKucKzZAyychvLgQk uiAOnQMqU3NrKhZ1hCko7TTKuxwsBkqRa73bWBxwwBkhUrr/JXKDGq7+7aS6+4JUew+L ww9SdNK6HEFeq2wmFdtjDH9iOnc2gArpzNE5+Zpp8R3CJOaEHo7PFYqx++miXRHMwEOd jU4A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :references:message-id:subject:cc:to:from:date:dkim-signature; bh=ciUcqpYBqZeAizd1bXUZV1jOtaGsZb5b//1Mxq7v5tY=; fh=ORhphsvT24Jzi5vnzt7Q9muxsaJ7wrZoiVUtK8nPWzY=; b=cY/rWP4CPTL2xvzu906MfYIvIzPPkBUu3A/NaG/1XZXpNGZQtXau/KYBs3BaEYN8eb 48UyxI9jAMhE+mZGnRqYevkDucPFkzVw7yV14KHDGvY/43wpiPU1eqMeEJFXxtKMRMhj m/rcKo5U+v8Iy1aot9MJ40ZGDNEIrIjH8T/P8OUXxeVk23tNEbbQtnDRxBWoQWYl3+eK 3/iVTwQIb5Sm2kZTobYOI3hvNufQEVlYuwd88GYVXHOaYv2q3gxt/xWKDwNZ1YtWHvVZ gMCXlg3XGsq43b9GFY33VNS3QfCgw0mckZfHSOZ+rVg4XPAzkxlvCzcS4/9GQ/aa9KtS y6eQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=mxcgBmlO; arc=pass (i=1 spf=pass spfdomain=rivosinc.com dkim=pass dkdomain=rivosinc-com.20230601.gappssmtp.com); spf=pass (google.com: domain of linux-kernel+bounces-83897-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-83897-linux.lists.archive=gmail.com@vger.kernel.org" Return-Path: Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [2604:1380:40f1:3f00::1]) by mx.google.com with ESMTPS id on6-20020a17090b1d0600b002995185d868si5922200pjb.190.2024.02.27.11.49.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 11:49:56 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-83897-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) client-ip=2604:1380:40f1:3f00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=mxcgBmlO; arc=pass (i=1 spf=pass spfdomain=rivosinc.com dkim=pass dkdomain=rivosinc-com.20230601.gappssmtp.com); spf=pass (google.com: domain of linux-kernel+bounces-83897-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-83897-linux.lists.archive=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 88109B2ADD0 for ; Tue, 27 Feb 2024 19:07:31 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8C5FC50A7C; Tue, 27 Feb 2024 19:07:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="mxcgBmlO" Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBEB33D988 for ; Tue, 27 Feb 2024 19:07:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.180 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709060843; cv=none; b=ug4cSqUPWwz6RNXmpQJYMGIkeMo8BVCXu/jSBZ1NBMyUaxYFNTWv+FvtBqovoqoDPjdThWt7GRpOtGuS1/vVQj2mK2OSwYwgrcrGTGYZ2uSte1U5rpAb0eWKYzEM1S1S0KYjAy70bC7wNu007212bclqug2IzX/jKRkF9A6OWLI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709060843; c=relaxed/simple; bh=d4YS6qDnqsxc0ZcDBJA6aOLb3GyoEOHo09+HXgEFdYI=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ZozKH4LEysLtGtEhpYh2K4I2Jf9ruvnZSyWdBtDCewjJiLxsLPBErpNUHCLNB5nyj77hsZp6x62AMKblHdKTZvCuKIUPmBVAkzJzRgIZqjIdIrnn7hc1wIxb72L4y6HTn1pKGUcvIANvzcMDoYeSzPZhyays8+v9UTSyMxNATcA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=mxcgBmlO; arc=none smtp.client-ip=209.85.210.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pf1-f180.google.com with SMTP id d2e1a72fcca58-6e4c359e48aso2985135b3a.1 for ; Tue, 27 Feb 2024 11:07:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709060841; x=1709665641; darn=vger.kernel.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=ciUcqpYBqZeAizd1bXUZV1jOtaGsZb5b//1Mxq7v5tY=; b=mxcgBmlO1tKx5UsvQ8QK+sEcO/79ZhFgkcWzCCD1ObqYQkdh8ANJ0Q04dT/r2+7Bv0 YFyMWMosXDnpAcV5yIX/7cHLLo1+lZdGIpECLS5wPwzSmfRMf3EitYG8M7t6Akwl1arx NBMTiKJoc8pfVDterquBDWBlA3U8LpBdOdaXJdRCMvOroZRiaid8hoX6Tln56iFgnaW+ kiHb7b4GLgvYrLVB83ZeLj/m174rgL2mBZt7OJfN3GoBWWKOusqYw+rH1cxULTwsXtru U5GfHlz1++xDQe7zACYpR5MgM/TSYKAYz6suzw0S8mknrgLkVwcEd8rUWPsJM6EiCiXg GdAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709060841; x=1709665641; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ciUcqpYBqZeAizd1bXUZV1jOtaGsZb5b//1Mxq7v5tY=; b=dsiDPvyLYfQjEMgGREO3I+rkkDLdswLSuzYFYUL+qgjRzMNlbk0oW04feJtgw/pRFY Ik/yX+RvOdb2bNope/bSaXlRrO/haHbZtYBwB/8Jl10CCUN9MzEp3T09RyjplrfQbKfq TI2YqsiQmLRAHcZmysSg2AIlSwFon35m1zPHrXi95M5hKCzRJ13KqgocwNRP++ThoxAA gSd8oZLOWiuSFUvUjCdZVU1TmNSiK1PN2HtclXDRsc8f47mpDk23vyVawLEusD8YGt97 ybTqXW2a+JwqRC7xEwFSPl7h2eQ5JreA/S1ucNYUn7hhzErOt2yMZXq4GMJJIcrRhoaP mDnw== X-Forwarded-Encrypted: i=1; AJvYcCW2pceigVsoYqXLuhMYTDpsclsDFZUYV4yT5jWlLT/c0lvCe+gxy2VjDTiM3bmrjQjsEeeYY5AujcsgDcQtaluarjQ9ZIdKSUHXU1zv X-Gm-Message-State: AOJu0Yzw7yzUkZ73olLEmQ3VM82rr7HJPpy6C+am7HsdHRYRf4zdqCwY ysvdwBtHSJff/CLSaO2OhT4T5qsy1FzQ0gje3jC8wxqpvaK/MrzFO/i2gH7P97o= X-Received: by 2002:a62:cd4e:0:b0:6e3:79ba:6eed with SMTP id o75-20020a62cd4e000000b006e379ba6eedmr12060537pfg.13.1709060841076; Tue, 27 Feb 2024 11:07:21 -0800 (PST) Received: from ghost ([50.213.54.97]) by smtp.gmail.com with ESMTPSA id i19-20020aa787d3000000b006e5544046e9sm816658pfo.19.2024.02.27.11.07.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 11:07:20 -0800 (PST) Date: Tue, 27 Feb 2024 11:07:18 -0800 From: Charlie Jenkins To: Evan Green Cc: Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang , =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= , Eric Biggers , Elliot Berman , Charles Lohr , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 2/2] riscv: Set unalignment speed at compile time Message-ID: References: <20240216-disable_misaligned_probe_config-v4-0-dc01e581c0ac@rivosinc.com> <20240216-disable_misaligned_probe_config-v4-2-dc01e581c0ac@rivosinc.com> <20240227-condone-impeach-9469dffc6b47@wendy> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Tue, Feb 27, 2024 at 10:48:39AM -0800, Evan Green wrote: > On Tue, Feb 27, 2024 at 10:17 AM Charlie Jenkins wrote: > > > > On Tue, Feb 27, 2024 at 11:39:25AM +0000, Conor Dooley wrote: > > > On Fri, Feb 16, 2024 at 12:33:19PM -0800, Charlie Jenkins wrote: > > > > Introduce Kconfig options to set the kernel unaligned access support. > > > > These options provide a non-portable alternative to the runtime > > > > unaligned access probe. > > > > > > > > To support this, the unaligned access probing code is moved into it's > > > > own file and gated behind a new RISCV_PROBE_UNALIGNED_ACCESS_SUPPORT > > > > option. > > > > > > > > Signed-off-by: Charlie Jenkins > > > > --- > > > > arch/riscv/Kconfig | 58 +++++- > > > > arch/riscv/include/asm/cpufeature.h | 30 +++- > > > > arch/riscv/kernel/Makefile | 6 +- > > > > arch/riscv/kernel/cpufeature.c | 255 -------------------------- > > > > arch/riscv/kernel/misaligned_access_speed.c | 265 ++++++++++++++++++++++++++++ > > > > arch/riscv/kernel/probe_emulated_access.c | 64 +++++++ > > > > arch/riscv/kernel/sys_hwprobe.c | 25 +++ > > > > arch/riscv/kernel/traps_misaligned.c | 54 +----- > > > > 8 files changed, 442 insertions(+), 315 deletions(-) > > > > > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > > > index bffbd869a068..3cf700adc43b 100644 > > > > --- a/arch/riscv/Kconfig > > > > +++ b/arch/riscv/Kconfig > > > > @@ -690,25 +690,71 @@ config THREAD_SIZE_ORDER > > > > config RISCV_MISALIGNED > > > > > > > > > Why can we not make up our minds on what to call this? The majority of > > > users are "unaligned" but the file you add and this config option are > > > "misaligned." > > > > We have both everywhere, maybe we (I?) should go in and standardize the > > wording everywhere. I personally prefer "misaligned" which means > > "incorrectly aligned" over "unaligned" which means "not aligned" because > > a 7-bit alignment is still "aligned" along a 7-bit boundary, but it is > > certainly incorrectly aligned. > > > > > > > > > bool "Support misaligned load/store traps for kernel and userspace" > > > > select SYSCTL_ARCH_UNALIGN_ALLOW > > > > + depends on RISCV_PROBE_UNALIGNED_ACCESS || RISCV_EMULATED_UNALIGNED_ACCESS > > > > default y > > > > help > > > > Say Y here if you want the kernel to embed support for misaligned > > > > load/store for both kernel and userspace. When disable, misaligned > > > > accesses will generate SIGBUS in userspace and panic in kernel. > > > > > > > > +choice > > > > + prompt "Unaligned Accesses Support" > > > > + default RISCV_PROBE_UNALIGNED_ACCESS > > > > + help > > > > + This selects the hardware support for unaligned accesses. This > > > > + information is used by the kernel to perform optimizations. It is also > > > > + exposed to user space via the hwprobe syscall. The hardware will be > > > > + probed at boot by default. > > > > + > > > > +config RISCV_PROBE_UNALIGNED_ACCESS > > > > + bool "Probe for hardware unaligned access support" > > > > + help > > > > + During boot, the kernel will run a series of tests to determine the > > > > + speed of unaligned accesses. This is the only portable option. This > > > > + probing will dynamically determine the speed of unaligned accesses on > > > > + the boot hardware. > > > > + > > > > +config RISCV_EMULATED_UNALIGNED_ACCESS > > > > + bool "Assume the CPU expects emulated unaligned memory accesses" > > > > + depends on NONPORTABLE > > > > > > This is portable too, right? > > > > I guess so? I think I would prefer to have the probing being the only > > portable option. > > > > > > > > > + select RISCV_MISALIGNED > > > > + help > > > > + Assume that the CPU expects emulated unaligned memory accesses. > > > > + When enabled, this option notifies the kernel and userspace that > > > > + unaligned memory accesses will be emulated by the kernel. > > > > > > > To enforce > > > > + this expectation, RISCV_MISALIGNED is selected by this option. > > > > > > Drop this IMO, let Kconfig handle displaying the dependencies. > > > > > > > I was debating if Kconfig handling was enough, so I am glad it is, I > > will remove this. > > > > > > + > > > > +config RISCV_SLOW_UNALIGNED_ACCESS > > > > + bool "Assume the CPU supports slow unaligned memory accesses" > > > > + depends on NONPORTABLE > > > > + help > > > > + Assume that the CPU supports slow unaligned memory accesses. When > > > > + enabled, this option improves the performance of the kernel on such > > > > + CPUs. > > > > > > Does it? Are you sure that generating unaligned accesses on systems > > > where they are slow is a performance increase? > > > That said, I don't really see this option actually doing anything other > > > than setting the value for hwprobe, so I don't actually know what the > > > effect of this option actually is on the kernel's performance. > > > > > > Generally I would like to suggest a change from "CPU" to "system" here, > > > since the slow cases that exist are mostly because the unaligned access > > > is actually emulated in firmware. > > > > It would be ideal if "emulated" was used for any case of emulated > > accesses (firmware or in the kernel). Doing emulated accesses will be > > orders of magnitude slower than a processor that "slowly" handles the > > accesses. > > > > So even if the processor performs a "slow" access, it could still be > > beneficial for the kernel to do the misaligned access rather than manual > > do the alignment. > > > > Currently there is no place that takes into account this "slow" option > > but I wanted to leave it open for future optimizations. > > > > > > > > > However, the kernel will run much more slowly, or will not be > > > > + able to run at all, on CPUs that do not support unaligned memory > > > > + accesses. > > > > + > > > > config RISCV_EFFICIENT_UNALIGNED_ACCESS > > > > bool "Assume the CPU supports fast unaligned memory accesses" > > > > depends on NONPORTABLE > > > > select DCACHE_WORD_ACCESS if MMU > > > > select HAVE_EFFICIENT_UNALIGNED_ACCESS > > > > help > > > > - Say Y here if you want the kernel to assume that the CPU supports > > > > - efficient unaligned memory accesses. When enabled, this option > > > > - improves the performance of the kernel on such CPUs. However, the > > > > - kernel will run much more slowly, or will not be able to run at all, > > > > - on CPUs that do not support efficient unaligned memory accesses. > > > > + Assume that the CPU supports fast unaligned memory accesses. When > > > > + enabled, this option improves the performance of the kernel on such > > > > + CPUs. However, the kernel will run much more slowly, or will not be > > > > + able to run at all, on CPUs that do not support efficient unaligned > > > > + memory accesses. > > > > + > > > > +config RISCV_UNSUPPORTED_UNALIGNED_ACCESS > > > > > > This option needs to be removed. The uabi states that unaligned access > > > is supported in userspace, if the cpu or firmware does not implement > > > unaligned access then the kernel must emulate it. > > > > Should it removed from hwprobe as well then? > > We had added it as a hwprobe value in this discussion: > https://lore.kernel.org/lkml/Y+1VOXyKDDHEuejJ@spud/ > > Personally I like it as a possible hwprobe value, even if it is in > conflict with the uabi. I can't fully defend it, other than as a very > forward looking possibility, and as a nice value for people doing > weird things off the beaten path. My preference would be to keep it in > hwprobe, but I'm fine with not having a Kconfig for it. > > -Evan Seems reasonable to me, I will remove it from the Kconfig. - Charlie