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X-MS-Exchange-CrossTenant-Id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: kbmMGcPAYR0uQPHPfbgOpqlifjPyy8xH55rmGisvV0Qf0Cxo8OZpEx8z0hDXpjC4u0VKlx1l4NSQMA73dLKMHw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO1PR10MB4769 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-28_04,2024-02-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 bulkscore=0 malwarescore=0 adultscore=0 mlxscore=0 mlxlogscore=999 phishscore=0 suspectscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402280034 X-Proofpoint-ORIG-GUID: VOvepnwTbSXC2XPqeqIogtq7aOEpsAZU X-Proofpoint-GUID: VOvepnwTbSXC2XPqeqIogtq7aOEpsAZU On 2/27/24 18:41, Sean Christopherson wrote: > Define more #NPF error code flags that are relevant to SEV+ (mostly SNP) > guests, as specified by the APM: > > * Bit 34 (ENC): Set to 1 if the guest’s effective C-bit was 1, 0 otherwise. > * Bit 35 (SIZEM): Set to 1 if the fault was caused by a size mismatch between > PVALIDATE or RMPADJUST and the RMP, 0 otherwise. > * Bit 36 (VMPL): Set to 1 if the fault was caused by a VMPL permission > check failure, 0 otherwise. > * Bit 37 (SSS): Set to VMPL permission mask SSS (bit 4) value if VmplSSS is > enabled. The above bits 34-37 do not match with the bits 31,34-36 in the patch. Dongli Zhang > > Note, the APM is *extremely* misleading, and strongly implies that the > above flags can _only_ be set for #NPF exits from SNP guests. That is a > lie, as bit 34 (C-bit=1, i.e. was encrypted) can be set when running _any_ > flavor of SEV guest on SNP capable hardware. > > Signed-off-by: Sean Christopherson > --- > arch/x86/include/asm/kvm_host.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index 88cc523bafa8..1e69743ef0fb 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -261,8 +261,12 @@ enum x86_intercept_stage; > #define PFERR_FETCH_MASK BIT(4) > #define PFERR_PK_MASK BIT(5) > #define PFERR_SGX_MASK BIT(15) > +#define PFERR_GUEST_RMP_MASK BIT_ULL(31) > #define PFERR_GUEST_FINAL_MASK BIT_ULL(32) > #define PFERR_GUEST_PAGE_MASK BIT_ULL(33) > +#define PFERR_GUEST_ENC_MASK BIT_ULL(34) > +#define PFERR_GUEST_SIZEM_MASK BIT_ULL(35) > +#define PFERR_GUEST_VMPL_MASK BIT_ULL(36) > #define PFERR_IMPLICIT_ACCESS BIT_ULL(48) > > #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \