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Message-ID: <7cd328e2-6847-973f-c38b-93d1e64d3771@quicinc.com>
Date: Wed, 28 Feb 2024 18:37:01 +0530
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Subject: Re: [PATCH v5 0/3] arm64: qcom: sa8775p: add cache coherency support
 for SA8775P
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To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        <andersson@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <conor+dt@kernel.org>, <konrad.dybcio@linaro.org>,
        <manivannan.sadhasivam@linaro.org>, <robh@kernel.org>
CC: <quic_shazhuss@quicinc.com>, <quic_nitegupt@quicinc.com>,
        <quic_ramkri@quicinc.com>, <quic_nayiluri@quicinc.com>,
        <dmitry.baryshkov@linaro.org>, <quic_krichai@quicinc.com>,
        <quic_vbadigan@quicinc.com>, <quic_schintav@quicinc.com>,
        Lorenzo Pieralisi
	<lpieralisi@kernel.org>,
        =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?=
	<kw@linux.com>,
        Bjorn Helgaas <bhelgaas@google.com>, <linux-arm-msm@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-pci@vger.kernel.org>
References: <1708697021-16877-1-git-send-email-quic_msarkar@quicinc.com>
 <866ea7ee-54c3-4a89-981e-64d6d3b46497@linaro.org>
From: Mrinmay Sarkar <quic_msarkar@quicinc.com>
In-Reply-To: <866ea7ee-54c3-4a89-981e-64d6d3b46497@linaro.org>
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On 2/24/2024 3:49 PM, Krzysztof Kozlowski wrote:
> On 23/02/2024 15:03, Mrinmay Sarkar wrote:
>> Due to some hardware changes, SA8775P has set the NO_SNOOP attribute
>> in its TLP for all the PCIe controllers. NO_SNOOP attribute when set,
>> the requester is indicating that there no cache coherency issues exit
>> for the addressed memory on the host i.e., memory is not cached. But
>> in reality, requester cannot assume this unless there is a complete
>> control/visibility over the addressed memory on the host.
>>
>> And worst case, if the memory is cached on the host, it may lead to
>> memory corruption issues. It should be noted that the caching of memory
>> on the host is not solely dependent on the NO_SNOOP attribute in TLP.
>>
>> So to avoid the corruption, this patch overrides the NO_SNOOP attribute
>> by setting the PCIE_PARF_NO_SNOOP_OVERIDE register. This patch is not
>> needed for other upstream supported platforms since they do not set
>> NO_SNOOP attribute by default.
>>
>> This series is to enable cache snooping logic in both RC and EP driver
>> and add the "dma-coherent" property in dtsi to support cache coherency
>> in SA8775P platform.
> Please confirm that your patchset passes 100% dtbs_check.
>
> Best regards,
> Krzysztof

I have run dtbs_check and it is passing.

Thanks
Mrinmay

>