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Date: Wed, 28 Feb 2024 15:21:36 +0000
From: Conor Dooley <conor@kernel.org>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/4] riscv: Allow NOMMU kernels to run in S-mode
Message-ID: <20240228-reverence-vaseline-590175d7901e@spud>
References: <20240227003630.3634533-1-samuel.holland@sifive.com>
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 <20240227-seventh-overgrown-2fa453e8a775@wendy>
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On Tue, Feb 27, 2024 at 01:02:11PM -0600, Samuel Holland wrote:
> Hi Conor,
>=20
> On 2024-02-27 6:24 AM, Conor Dooley wrote:
> > On Mon, Feb 26, 2024 at 04:34:49PM -0800, Samuel Holland wrote:
> >> For ease of testing, it is convenient to run NOMMU kernels in supervis=
or
> >> mode. The only required change is to offset the kernel load address,
> >> since the beginning of RAM is usually reserved for M-mode firmware.
> >>
> >> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> >> ---
> >>
> >>  arch/riscv/Kconfig | 15 ++++++++++-----
> >>  1 file changed, 10 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> >> index ef53c00470d6..0dc09b2ac2f6 100644
> >> --- a/arch/riscv/Kconfig
> >> +++ b/arch/riscv/Kconfig
> >> @@ -64,7 +64,7 @@ config RISCV
> >>  	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
> >>  	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
> >>  	select BUILDTIME_TABLE_SORT if MMU
> >> -	select CLINT_TIMER if !MMU
> >> +	select CLINT_TIMER if RISCV_M_MODE
> >>  	select CLONE_BACKWARDS
> >>  	select COMMON_CLK
> >>  	select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND
> >> @@ -220,8 +220,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MAX
> >> =20
> >>  # set if we run in machine mode, cleared if we run in supervisor mode
> >>  config RISCV_M_MODE
> >> -	bool
> >> -	default !MMU
> >> +	bool "Build a kernel that runs in machine mode"
> >> +	depends on !MMU
> >> +	default y
> >> +	help
> >> +	  Select this option if you want to run the kernel in M-mode,
> >> +	  without the assistance of any other firmware.
> >> =20
> >>  # set if we are running in S-mode and can use SBI calls
> >>  config RISCV_SBI
> >> @@ -238,8 +242,9 @@ config MMU
> >> =20
> >>  config PAGE_OFFSET
> >>  	hex
> >> -	default 0xC0000000 if 32BIT && MMU
> >> -	default 0x80000000 if !MMU
> >> +	default 0x80000000 if !MMU && RISCV_M_MODE
> >> +	default 0x80200000 if !MMU
> >> +	default 0xc0000000 if 32BIT
> >>  	default 0xff60000000000000 if 64BIT
> >=20
> > The first default seen with a passing condition is the default chosen,
> > right?
>=20
> Yes, exactly. It's not required for the conditions to all be disjoint.

I had actually gone and checked was doing the right thing, but I didn't
manage to convince myself that this was intended behaviour rather than
an implementation detail. What I saw in the docs for default was:
"If multiple default values are visible, only the first defined one is acti=
ve"
and I suppose "visible" is what is used to cover the if part.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Cheers,
Conor.

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