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b=l4N6D40yIPpo8akm4SWx1BueecSV91H62o+gpGuIu+tZkLTY8DWwg5Ar9w1pgp7ET1Xr7GrhZoJyGCRFx1jq8j41fcsAVqBOtapoTALZOp04ECubIrRu+9ftNkc8xydBgca3g1GWNNRpH6MkEIeO0SJS1nGwEV7/jSmMKFS9RMw= Received: from DU2PR04MB8822.eurprd04.prod.outlook.com (2603:10a6:10:2e1::11) by AS8PR04MB8215.eurprd04.prod.outlook.com (2603:10a6:20b:3b3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7316.41; Thu, 29 Feb 2024 06:07:05 +0000 Received: from DU2PR04MB8822.eurprd04.prod.outlook.com ([fe80::d45f:4483:c11:68b0]) by DU2PR04MB8822.eurprd04.prod.outlook.com ([fe80::d45f:4483:c11:68b0%7]) with mapi id 15.20.7316.039; Thu, 29 Feb 2024 06:07:04 +0000 From: Xu Yang To: Will Deacon CC: Frank Li , "mark.rutland@arm.com" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "conor+dt@kernel.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "john.g.garry@oracle.com" , "jolsa@kernel.org" , "namhyung@kernel.org" , "irogers@google.com" , dl-linux-imx , "mike.leach@linaro.org" , "leo.yan@linaro.org" , "peterz@infradead.org" , "mingo@redhat.com" , "acme@kernel.org" , "alexander.shishkin@linux.intel.com" , "adrian.hunter@intel.com" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-perf-users@vger.kernel.org" , "imx@lists.linux.dev" Subject: RE: [EXT] Re: [PATCH v4 2/6] perf: imx_perf: refactor driver for imx93 Thread-Topic: [EXT] Re: [PATCH v4 2/6] perf: imx_perf: refactor driver for imx93 Thread-Index: AQHaVAmW7Yq7ArBlhEOdhoctfv64r7EWanQAgAF77lA= Date: Thu, 29 Feb 2024 06:07:04 +0000 Message-ID: References: <20240131055811.3035741-1-xu.yang_2@nxp.com> <20240131055811.3035741-2-xu.yang_2@nxp.com> <20240222121838.GA8308@willie-the-truck> In-Reply-To: <20240222121838.GA8308@willie-the-truck> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8822.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 83a22389-fc5e-4b33-ff9a-08dc38eca73f X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Feb 2024 06:07:04.8586 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: fmP3UijlT0abgXC8aVvOHi0uEjAonbZX6uxLHZQWIkbgn16zk+We5diZW1SQMXweQ5YogFthvC3NMXm3VDjrWQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8215 Hi Will, >=20 >=20 > On Wed, Jan 31, 2024 at 01:58:07PM +0800, Xu Yang wrote: > > This driver is initinally used to support imx93 Soc and now it's time t= o > > add support for imx95 Soc. However, some macro definitions and events a= re > > different on these two Socs. For preparing imx95 supports, this will > > refactor driver for imx93. > > > > Signed-off-by: Xu Yang > > > > --- > > Changes in v4: > > - new patch > > --- > > drivers/perf/fsl_imx9_ddr_perf.c | 121 ++++++++++++++++++++++--------- > > 1 file changed, 87 insertions(+), 34 deletions(-) >=20 > [...] >=20 > > @@ -476,12 +490,12 @@ static int ddr_perf_event_add(struct perf_event *= event, int flags) > > hwc->idx =3D counter; > > hwc->state |=3D PERF_HES_STOPPED; > > > > + /* read trans, write trans, read beat */ > > + imx93_ddr_perf_monitor_config(pmu, cfg, cfg1, cfg2); > > + > > if (flags & PERF_EF_START) > > ddr_perf_event_start(event, flags); > > > > - /* read trans, write trans, read beat */ > > - ddr_perf_monitor_config(pmu, cfg, cfg1, cfg2); > > - > > return 0; >=20 > This change looks like more than just refactoring and should probably be = a > separate patch. Is it a bug fix for the existing code? Yes, I found the order has an impact. I will create a patch for it. >=20 > > +static int ddr_perf_add_events(struct ddr_pmu *pmu) > > +{ > > + int i, ret; > > + struct attribute **attrs =3D pmu->devtype_data->attrs; > > + struct device *pmu_dev =3D pmu->pmu.dev; > > + > > + if (!attrs) > > + return 0; > > + > > + for (i =3D 0; attrs[i]; i++) { > > + ret =3D sysfs_add_file_to_group(&pmu_dev->kobj, attrs[i],= "events"); > > + if (ret) { > > + dev_warn(pmu->dev, "i.MX9 DDR Perf add events fai= led (%d)\n", ret); > > + return ret; >=20 > Can you use the '.is_visible' callback in 'struct attribute_group' to avo= id > having to manipulate sysfs directly like this? For example, create separa= te > groups for the imx93 and imx95-specific events and only make them visible > if we're on the appropriate hardware. Yes, I will try your suggestion. Thanks, Xu Yang