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AJvYcCWlu7huaqeJNppQ1tiK/paPnFTHC+I6U6kGYnC7cKFKoD4qxjY5uPCeRRD44yRTYUzLY9M/uNvsI0er00/yqBojCzCVz3C9UypsYpXz X-Gm-Message-State: AOJu0Yz9ORP7yS+WR1t5ZaEs0z+XGOplX31nkPnITcmEa70tWqjlq0UM Q7gJ/juBkjYGfj5BTTHTXSte6jmWPruYdJ84rWeH8C2HdhbmqgFjQCOAxGCW/DriAuY/iVz0lZi ZIG4AWeOy2mDnhAqPLIy25eqNeV0mnu2ZFhjq X-Received: by 2002:a2e:98c6:0:b0:2d2:3b9e:dcff with SMTP id s6-20020a2e98c6000000b002d23b9edcffmr691931ljj.46.1709191065361; Wed, 28 Feb 2024 23:17:45 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240108081834.408403-1-treapking@chromium.org> In-Reply-To: From: Chen-Yu Tsai Date: Thu, 29 Feb 2024 15:17:34 +0800 Message-ID: Subject: Re: [PATCH v3 1/2] clk: mediatek: Introduce need_pm_runtime to mtk_clk_desc To: AngeloGioacchino Del Regno Cc: Pin-yen Lin , Michael Turquette , Stephen Boyd , Matthias Brugger , Weiyi Lu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Feb 26, 2024 at 7:16=E2=80=AFPM AngeloGioacchino Del Regno wrote: > > Il 23/02/24 05:27, Chen-Yu Tsai ha scritto: > > On Mon, Jan 8, 2024 at 4:18=E2=80=AFPM Pin-yen Lin wrote: > >> > >> Introduce a new need_pm_runtime variable to mtk_clk_desc to indicate > >> this clock controller needs runtime PM for its operations. > >> Also do a runtime PM get on the clock controller during the > >> probing stage to workaround a possible deadlock. > >> > >> Signed-off-by: Pin-yen Lin > > > > Reviewed-by: Chen-Yu Tsai > > > > The patch itself looks fine. > > > > Besides the MT8183 MFG clock issues, we do actually need this for the > > MT8192 ADSP clock. Its power domain is not enabled by default. > > > > ...but on MT8195 the ADSP clock works - because the ADSP node exists. That's an indirect dependency that should not be relied on. Say the clock driver probed but the ADSP hasn't, and you try to read out the current status. What would happen? - Read out works fine, because the power domain is default on, and hasn't been turned off by late cleanup - Read out is bogus (but you can't tell) - Read out hangs. The third is what happens on MT8192. There's still some issues on that front, as even after I applied the ADSP power domain patches from MediaTek, the readout was still hanging. > This poses a question: should we make clock controllers depend on power d= omains, > or should we keep everything powered off (hence clocks down - no power co= nsumption) > *unless* the user exists? That's a policy discussion separate from actual hardware dependencies. *If* the clock controller needs the power domain to be active for the registers to be accessed, the clock controller *must* have a direct dependency on the power domain. > For the second one, this means that the *device* gets the power domain (a= dsp), and > not the clock controller (which clocks are effectively useless if there's= no user). No. See my previous paragraph. ChenYu > Angelo > > >> --- > >> > >> Changes in v3: > >> - Update the commit message and the comments before runtime PM call > >> > >> Changes in v2: > >> - Fix the order of error handling > >> - Update the commit message and add a comment before the runtime PM ca= ll > >> > >> drivers/clk/mediatek/clk-mtk.c | 19 +++++++++++++++++++ > >> drivers/clk/mediatek/clk-mtk.h | 2 ++ > >> 2 files changed, 21 insertions(+) > >> > >> diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk= -mtk.c > >> index 2e55368dc4d8..ba1d1c495bc2 100644 > >> --- a/drivers/clk/mediatek/clk-mtk.c > >> +++ b/drivers/clk/mediatek/clk-mtk.c > >> @@ -13,6 +13,7 @@ > >> #include > >> #include > >> #include > >> +#include > >> #include > >> > >> #include "clk-mtk.h" > >> @@ -494,6 +495,18 @@ static int __mtk_clk_simple_probe(struct platform= _device *pdev, > >> return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM= ; > >> } > >> > >> + > >> + if (mcd->need_runtime_pm) { > >> + devm_pm_runtime_enable(&pdev->dev); > >> + /* > >> + * Do a pm_runtime_resume_and_get() to workaround a po= ssible > >> + * deadlock between clk_register() and the genpd frame= work. > >> + */ > >> + r =3D pm_runtime_resume_and_get(&pdev->dev); > >> + if (r) > >> + return r; > >> + } > >> + > >> /* Calculate how many clk_hw_onecell_data entries to allocate= */ > >> num_clks =3D mcd->num_clks + mcd->num_composite_clks; > >> num_clks +=3D mcd->num_fixed_clks + mcd->num_factor_clks; > >> @@ -574,6 +587,9 @@ static int __mtk_clk_simple_probe(struct platform_= device *pdev, > >> goto unregister_clks; > >> } > >> > >> + if (mcd->need_runtime_pm) > >> + pm_runtime_put(&pdev->dev); > >> + > >> return r; > >> > >> unregister_clks: > >> @@ -604,6 +620,9 @@ static int __mtk_clk_simple_probe(struct platform_= device *pdev, > >> free_base: > >> if (mcd->shared_io && base) > >> iounmap(base); > >> + > >> + if (mcd->need_runtime_pm) > >> + pm_runtime_put(&pdev->dev); > >> return r; > >> } > >> > >> diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk= -mtk.h > >> index 22096501a60a..c17fe1c2d732 100644 > >> --- a/drivers/clk/mediatek/clk-mtk.h > >> +++ b/drivers/clk/mediatek/clk-mtk.h > >> @@ -237,6 +237,8 @@ struct mtk_clk_desc { > >> > >> int (*clk_notifier_func)(struct device *dev, struct clk *clk)= ; > >> unsigned int mfg_clk_idx; > >> + > >> + bool need_runtime_pm; > >> }; > >> > >> int mtk_clk_pdev_probe(struct platform_device *pdev); > >> -- > >> 2.43.0.472.g3155946c3a-goog > >> > > >