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29 Feb 2024 02:45:49 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rfdv9-00000008e1f-0QR7; Thu, 29 Feb 2024 12:45:47 +0200 Date: Thu, 29 Feb 2024 12:45:46 +0200 From: Andy Shevchenko To: Arturas Moskvinas Cc: linus.walleij@linaro.org, brgl@bgdev.pl, u.kleine-koenig@pengutronix.de, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] gpio: 74x164: Enable output pins after registers are reset Message-ID: References: <20240229084555.43701-2-arturas.moskvinas@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240229084555.43701-2-arturas.moskvinas@gmail.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Thu, Feb 29, 2024 at 10:45:56AM +0200, Arturas Moskvinas wrote: > Chip outputs are enabled[1] before actual reset is performed[2] which might > cause pin output value to flip flop if previous pin value was set to 1 in chip. > Change fixes that behavior by making sure chip is fully reset before all outputs > are enabled. > > Flip-flop can be noticed when module is removed and inserted again and one of > the pins was changed to 1 before removal. 100 microsecond flipping is > noticeable on oscilloscope (100khz SPI bus). > > For a properly reset chip - output is enabled around 100 microseconds (on 100khz > SPI bus) later during probing process hence should be irrelevant behavioral > change. > [1] - https://elixir.bootlin.com/linux/v6.7.4/source/drivers/gpio/gpio-74x164.c#L130 > [2] - https://elixir.bootlin.com/linux/v6.7.4/source/drivers/gpio/gpio-74x164.c#L150 Please, convert these to be Link tags, so at the end it will look like Fixes: Link: URL1 [1] Link: URL2 [2] Signed-off-by: -- With Best Regards, Andy Shevchenko