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Wysocki" Date: Thu, 29 Feb 2024 18:32:59 +0100 Message-ID: Subject: Re: [PATCH v1 3/3] ACPI: CPPC: Read CPC FFH counters in a single IPI To: Vanshidhar Konda Cc: Huisong Li , Beata Michalska , Ionela Voinescu , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rafael@kernel.org, sumitg@nvidia.com, zengheng4@huawei.com, yang@os.amperecomputing.com, will@kernel.org, sudeep.holla@arm.com, liuyonglong@huawei.com, zhanjie9@hisilicon.com, linux-acpi@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Feb 29, 2024 at 5:25=E2=80=AFPM Vanshidhar Konda wrote: > > The CPPC driver reads delivered and reference counters using cpc_read > one at a time. This leads to inaccurate measurement of CPU frequency > discussed in [1]. If the firmware indicates that both the registers are > in the FFH interface the kernel can read the registers together in a > single IPI. This has two benefits: > 1. Reduces the number of IPIs needed to read the two registers > 2. The two registers will be read in close proximity resulting in more > accurate CPU frequency measurement > > [1]: https://lore.kernel.org/all/20230328193846.8757-1-yang@os.amperecomp= uting.com/ > > Signed-off-by: Vanshidhar Konda > --- > arch/arm64/kernel/topology.c | 37 ++++++++++++++++++++++++++++++++++++ > drivers/acpi/cppc_acpi.c | 32 +++++++++++++++++++++++++++---- > include/acpi/cppc_acpi.h | 13 +++++++++++++ > 3 files changed, 78 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c > index 8905eb0c681f..8207565f43ee 100644 > --- a/arch/arm64/kernel/topology.c > +++ b/arch/arm64/kernel/topology.c > @@ -421,6 +421,43 @@ int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *= val) > return ret; > } > > +static void cpc_update_freq_counters(void *info) > +{ > + update_freq_counters_refs(); > +} > + > +int cpc_read_regs_ffh(int cpu, struct ffh_cpc_reg_values *ffh_regs) > +{ > + struct amu_counters *ctrs =3D per_cpu_ptr(&cpu_samples, cpu); > + int idx; > + > + if (!cpc_ffh_supported() || !freq_counters_valid(cpu)) > + return -EOPNOTSUPP; > + > + if (WARN_ON_ONCE(irqs_disabled())) > + return -EPERM; > + > + if (!idle_cpu(cpu)) > + smp_call_function_single(cpu, cpc_update_freq_counters, N= ULL, 1); > + > + for (idx =3D 0; idx < MAX_NUM_CPC_REGS_FFH; idx++) { > + > + if (!ffh_regs->regs[idx].reg) > + continue; > + > + switch ((u64)(ffh_regs->regs[idx].reg->address)) { > + case 0x0: > + ffh_regs->regs[idx].value =3D ctrs->core_cnt; > + break; > + case 0x1: > + ffh_regs->regs[idx].value =3D ctrs->const_cnt; > + break; > + } > + } > + > + return 0; > +} > + > int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val) > { > return -EOPNOTSUPP; > diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c > index d155a86a8614..55ffb1915e4f 100644 > --- a/drivers/acpi/cppc_acpi.c > +++ b/drivers/acpi/cppc_acpi.c > @@ -113,6 +113,10 @@ static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_pt= r); > (cpc)->cpc_entry.reg.space_id =3D=3D = \ > ACPI_ADR_SPACE_SYSTEM_IO) > > +#define CPC_IN_FFH(cpc) ((cpc)->type =3D=3D ACPI_TYPE_BUFFER && = \ > + (cpc)->cpc_entry.reg.space_id =3D=3D = \ > + ACPI_ADR_SPACE_FIXED_HARDWARE) > + > /* Evaluates to True if reg is a NULL register descriptor */ > #define IS_NULL_REG(reg) ((reg)->space_id =3D=3D ACPI_ADR_SPACE_SYSTEM_= MEMORY && \ > (reg)->address =3D=3D 0 && = \ > @@ -974,6 +978,11 @@ int __weak cpc_write_ffh(int cpunum, struct cpc_reg = *reg, u64 val) > return -ENOTSUPP; > } > > +int __weak cpc_read_regs_ffh(int cpu, struct ffh_cpc_reg_values *regs) > +{ > + return -ENOTSUPP; > +} This might return a bool value. Is there any case in which the caller would handle different error codes differently? > + > /* > * Since cpc_read and cpc_write are called while holding pcc_lock, it sh= ould be > * as fast as possible. We have already mapped the PCC subspace during i= nit, so > @@ -1317,7 +1326,7 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf= _fb_ctrs *perf_fb_ctrs) > int pcc_ss_id =3D per_cpu(cpu_pcc_subspace_idx, cpunum); > struct cppc_pcc_data *pcc_ss_data =3D NULL; > u64 delivered, reference, ref_perf, ctr_wrap_time; > - int ret =3D 0, regs_in_pcc =3D 0; > + int ret =3D 0, regs_in_pcc =3D 0, regs_read_in_ffh =3D 0; Please use bool as the type for boolean variables. > > if (!cpc_desc) { > pr_debug("No CPC descriptor for CPU:%d\n", cpunum); > @@ -1353,8 +1362,23 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_per= f_fb_ctrs *perf_fb_ctrs) > } > } > > - cpc_read(cpunum, delivered_reg, &delivered); > - cpc_read(cpunum, reference_reg, &reference); > + if (CPC_IN_FFH(delivered_reg) && CPC_IN_FFH(reference_reg)) { > + struct ffh_cpc_reg_values ffh_regs; > + > + ffh_regs.regs[0].reg =3D &(delivered_reg->cpc_entry.reg); > + ffh_regs.regs[1].reg =3D &(reference_reg->cpc_entry.reg); > + ret =3D cpc_read_regs_ffh(cpunum, &ffh_regs); > + if (!ret) { If cpc_read_regs_ffh() returned 'true' on success, the above could be writt= en as if (cpc_read_regs_ffh(cpunum, &ffh_regs)) { > + delivered =3D ffh_regs.regs[0].value; > + reference =3D ffh_regs.regs[1].value; > + regs_read_in_ffh =3D 1; > + } > + } > + > + if (!regs_read_in_ffh) { > + cpc_read(cpunum, delivered_reg, &delivered); > + cpc_read(cpunum, reference_reg, &reference); > + } > cpc_read(cpunum, ref_perf_reg, &ref_perf); > > /* > @@ -1366,7 +1390,7 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf= _fb_ctrs *perf_fb_ctrs) > if (CPC_SUPPORTED(ctr_wrap_reg)) > cpc_read(cpunum, ctr_wrap_reg, &ctr_wrap_time); > > - if (!delivered || !reference || !ref_perf) { > + if (!delivered || !reference || !ref_perf) { > ret =3D -EFAULT; > goto out_err; > } > diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h > index 3a0995f8bce8..0da614a50edd 100644 > --- a/include/acpi/cppc_acpi.h > +++ b/include/acpi/cppc_acpi.h > @@ -137,6 +137,18 @@ struct cppc_cpudata { > }; > > #ifdef CONFIG_ACPI_CPPC_LIB > + > +#define MAX_NUM_CPC_REGS_FFH 2 > + > +struct ffh_cpc_reg { > + struct cpc_reg *reg; > + u64 value; > +}; > + > +struct ffh_cpc_reg_values { > + struct ffh_cpc_reg regs[MAX_NUM_CPC_REGS_FFH]; > +}; > + > extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf); > extern int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf); > extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb= _ctrs); > @@ -153,6 +165,7 @@ extern unsigned int cppc_get_transition_latency(int c= pu); > extern bool cpc_ffh_supported(void); > extern bool cpc_supported_by_cpu(void); > extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val); > +extern int cpc_read_regs_ffh(int cpu, struct ffh_cpc_reg_values *regs); > extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val); > extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf); > extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls= , bool enable); > --